* [PATCH] target/i386: fix x86_64 pushw op
@ 2025-07-15 21:03 Thomas Ogrisegg
2025-10-11 7:26 ` Paolo Bonzini
0 siblings, 1 reply; 2+ messages in thread
From: Thomas Ogrisegg @ 2025-07-15 21:03 UTC (permalink / raw)
To: qemu-devel; +Cc: Paolo Bonzini, Richard Henderson, Eduardo Habkost
For x86_64 a 16 bit push op (pushw) of a memory address would generate
a 64 bit store on the stack instead of a 16 bit store.
For example:
pushw (%rax)
behaves like
pushq (%rax)
which is incorrect.
This patch fixes that.
Signed-off-by: Thomas Ogrisegg <tom-bugs-qemu@fnord.at>
---
target/i386/tcg/decode-new.c.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index cda32ee67..3892ec374 100644
--- a/target/i386/tcg/decode-new.c.inc
+++ b/target/i386/tcg/decode-new.c.inc
@@ -1541,7 +1541,7 @@ static void decode_group4_5(DisasContext *s, CPUX86State *env, X86OpEntry *entry
[0x0b] = X86_OP_ENTRYr(CALLF_m, M,p),
[0x0c] = X86_OP_ENTRYr(JMP_m, E,f64, zextT0),
[0x0d] = X86_OP_ENTRYr(JMPF_m, M,p),
- [0x0e] = X86_OP_ENTRYr(PUSH, E,f64),
+ [0x0e] = X86_OP_ENTRYr(PUSH, E,d64),
};
int w = (*b & 1);
--
2.39.5
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] target/i386: fix x86_64 pushw op
2025-07-15 21:03 [PATCH] target/i386: fix x86_64 pushw op Thomas Ogrisegg
@ 2025-10-11 7:26 ` Paolo Bonzini
0 siblings, 0 replies; 2+ messages in thread
From: Paolo Bonzini @ 2025-10-11 7:26 UTC (permalink / raw)
To: Thomas Ogrisegg; +Cc: qemu-devel, Richard Henderson, Eduardo Habkost
Queued, thanks.
Paolo
^ permalink raw reply [flat|nested] 2+ messages in thread
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