From: Brian Cain <brian.cain@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Cc: brian.cain@oss.qualcomm.com, richard.henderson@linaro.org,
philmd@linaro.org, matheus.bernardino@oss.qualcomm.com,
ale@rev.ng, anjo@rev.ng, marco.liebel@oss.qualcomm.com,
ltaylorsimpson@gmail.com, alex.bennee@linaro.org,
quic_mburton@quicinc.com, sid.manning@oss.qualcomm.com
Subject: [PATCH v3 4/4] tests/tcg/hexagon: Add cs{0,1} coverage
Date: Tue, 14 Oct 2025 06:29:07 -0700 [thread overview]
Message-ID: <20251014132907.3268743-5-brian.cain@oss.qualcomm.com> (raw)
In-Reply-To: <20251014132907.3268743-1-brian.cain@oss.qualcomm.com>
Cover cs0,1 register corruption in the signal_context test case.
lc0, sa0 registers previously omitted from the clobbers list
are now captured.
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
---
tests/tcg/hexagon/signal_context.c | 23 ++++++++++++++++++++---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/tests/tcg/hexagon/signal_context.c b/tests/tcg/hexagon/signal_context.c
index 7202fa64b6..12b78f1790 100644
--- a/tests/tcg/hexagon/signal_context.c
+++ b/tests/tcg/hexagon/signal_context.c
@@ -26,7 +26,11 @@ void sig_user(int sig, siginfo_t *info, void *puc)
"p1 = r7\n\t"
"p2 = r7\n\t"
"p3 = r7\n\t"
- : : : "r7", "p0", "p1", "p2", "p3");
+ "r6 = #0x12345678\n\t"
+ "cs0 = r6\n\t"
+ "r6 = #0x87654321\n\t"
+ "cs1 = r6\n\t"
+ : : : "r6", "r7", "p0", "p1", "p2", "p3");
}
int main()
@@ -53,7 +57,11 @@ int main()
timer_settime(tid, 0, &it, NULL);
asm("loop0(1f, %1)\n\t"
- "1: r8 = #0xff\n\t"
+ "1: r9 = #0xdeadbeef\n\t"
+ " cs0 = r9\n\t"
+ " r9 = #0xbadc0fee\n\t"
+ " cs1 = r9\n\t"
+ " r8 = #0xff\n\t"
" p0 = r8\n\t"
" p1 = r8\n\t"
" p2 = r8\n\t"
@@ -74,10 +82,19 @@ int main()
" r8 = p3\n\t"
" p0 = cmp.eq(r8, #0xff)\n\t"
" if (!p0) jump 2b\n\t"
+ " r8 = cs0\n\t"
+ " r9 = #0xdeadbeef\n\t"
+ " p0 = cmp.eq(r8, r9)\n\t"
+ " if (!p0) jump 2b\n\t"
+ " r8 = cs1\n\t"
+ " r9 = #0xbadc0fee\n\t"
+ " p0 = cmp.eq(r8, r9)\n\t"
+ " if (!p0) jump 2b\n\t"
"4: {}: endloop0\n\t"
:
: "r"(&err), "r"(i)
- : "memory", "r8", "p0", "p1", "p2", "p3");
+ : "memory", "r8", "r9", "p0", "p1", "p2", "p3", "cs0", "cs1", "lc0",
+ "sa0");
puts(err ? "FAIL" : "PASS");
return err;
--
2.34.1
next prev parent reply other threads:[~2025-10-14 13:30 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-14 13:29 [PATCH v3 0/4] linux-user/hexagon: fix sigcontext Brian Cain
2025-10-14 13:29 ` [PATCH v3 1/4] linux-user/hexagon: Fix sigcontext Brian Cain
2025-10-14 13:29 ` [PATCH v3 2/4] linux-user/hexagon: use abi_ulong Brian Cain
2025-10-14 13:29 ` [PATCH v3 3/4] linux-user/hexagon: Use an array for GPRs Brian Cain
2025-10-14 13:29 ` Brian Cain [this message]
2025-10-15 13:32 ` [PATCH v3 4/4] tests/tcg/hexagon: Add cs{0,1} coverage Taylor Simpson
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