From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: [PATCH v2 15/37] migration: Add vmstate_info_int128
Date: Tue, 14 Oct 2025 13:06:56 -0700 [thread overview]
Message-ID: <20251014200718.422022-16-richard.henderson@linaro.org> (raw)
In-Reply-To: <20251014200718.422022-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/migration/vmstate.h | 1 +
migration/vmstate-types.c | 30 ++++++++++++++++++++++++++++++
2 files changed, 31 insertions(+)
diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h
index 63ccaee07a..d8b9e157da 100644
--- a/include/migration/vmstate.h
+++ b/include/migration/vmstate.h
@@ -237,6 +237,7 @@ extern const VMStateInfo vmstate_info_int8;
extern const VMStateInfo vmstate_info_int16;
extern const VMStateInfo vmstate_info_int32;
extern const VMStateInfo vmstate_info_int64;
+extern const VMStateInfo vmstate_info_int128;
extern const VMStateInfo vmstate_info_uint8_equal;
extern const VMStateInfo vmstate_info_uint16_equal;
diff --git a/migration/vmstate-types.c b/migration/vmstate-types.c
index 4b01dc19c2..d335340e34 100644
--- a/migration/vmstate-types.c
+++ b/migration/vmstate-types.c
@@ -18,6 +18,7 @@
#include "migration/client-options.h"
#include "qemu/error-report.h"
#include "qemu/queue.h"
+#include "qemu/int128.h"
#include "trace.h"
#include "qapi/error.h"
@@ -194,6 +195,35 @@ const VMStateInfo vmstate_info_int64 = {
.put = put_int64,
};
+/* 128 bit int */
+
+static int get_int128(QEMUFile *f, void *pv, size_t size,
+ const VMStateField *field)
+{
+ Int128 *v = pv;
+ uint64_t hi, lo;
+
+ qemu_get_be64s(f, &hi);
+ qemu_get_be64s(f, &lo);
+ *v = int128_make128(lo, hi);
+ return 0;
+}
+
+static int put_int128(QEMUFile *f, void *pv, size_t size,
+ const VMStateField *field, JSONWriter *vmdesc)
+{
+ Int128 *v = pv;
+ qemu_put_be64(f, int128_gethi(*v));
+ qemu_put_be64(f, int128_getlo(*v));
+ return 0;
+}
+
+const VMStateInfo vmstate_info_int128 = {
+ .name = "int128",
+ .get = get_int128,
+ .put = put_int128,
+};
+
/* 8 bit unsigned int */
static int get_uint8(QEMUFile *f, void *pv, size_t size,
--
2.43.0
next prev parent reply other threads:[~2025-10-14 20:19 UTC|newest]
Thread overview: 79+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-14 20:06 [PATCH v2 00/37] target/arm: Implement FEAT_SYSREG128 Richard Henderson
2025-10-14 20:06 ` [PATCH v2 01/37] target/arm: Implement isar tests for FEAT_SYSREG128, FEAT_SYSINSTR128 Richard Henderson
2025-10-17 12:34 ` Peter Maydell
2025-10-14 20:06 ` [PATCH v2 02/37] target/arm: Define CP_REG_SIZE_U128 Richard Henderson
2025-10-17 12:37 ` Peter Maydell
2025-10-14 20:06 ` [PATCH v2 03/37] target/arm: Update ARMCPRegInfo for 128-bit sysregs Richard Henderson
2025-10-17 12:56 ` Peter Maydell
2025-10-14 20:06 ` [PATCH v2 04/37] target/arm: Asserts for ARM_CP_128BIT in define_one_arm_cp_reg Richard Henderson
2025-10-17 12:59 ` Peter Maydell
2025-10-17 15:01 ` Richard Henderson
2025-10-14 20:06 ` [PATCH v2 05/37] target/arm: Split add_cpreg_to_hashtable_aa64 Richard Henderson
2025-10-17 13:05 ` Peter Maydell
2025-10-14 20:06 ` [PATCH v2 06/37] target/arm: Add raw_read128, raw_write128 Richard Henderson
2025-10-17 13:07 ` Peter Maydell
2025-10-14 20:06 ` [PATCH v2 07/37] target/arm: Add read_raw_cp_reg128, write_raw_cp_reg128 Richard Henderson
2025-10-17 13:11 ` Peter Maydell
2025-10-17 15:04 ` Richard Henderson
2025-10-20 13:23 ` Peter Maydell
2025-10-14 20:06 ` [PATCH v2 08/37] target/arm: Use cpreg_field_type in arm_gen_one_feature_sysreg Richard Henderson
2025-10-17 13:14 ` Peter Maydell
2025-10-14 20:06 ` [PATCH v2 09/37] target/arm: Merge arm_gen_one_feature_sysreg into the single caller Richard Henderson
2025-10-17 13:16 ` Peter Maydell
2025-10-14 20:06 ` [PATCH v2 10/37] target/arm: Handle MO_128 in arm_gdb_get_sysreg Richard Henderson
2025-10-17 13:18 ` Peter Maydell
2025-10-14 20:06 ` [PATCH v2 11/37] target/arm: Handle ARM_CP_128BIT in cpu reset Richard Henderson
2025-10-17 13:34 ` Peter Maydell
2025-10-14 20:06 ` [PATCH v2 12/37] target/arm: Put 128-bit sysregs into a separate list Richard Henderson
2025-10-20 12:34 ` Peter Maydell
2025-10-14 20:06 ` [PATCH v2 13/37] target/arm/kvm: Assert no 128-bit sysregs in kvm_arm_init_cpreg_list Richard Henderson
2025-10-20 12:34 ` Peter Maydell
2025-10-14 20:06 ` [PATCH v2 14/37] target/arm/hvf: Assert no 128-bit sysregs in hvf_arch_init_vcpu Richard Henderson
2025-10-20 12:35 ` Peter Maydell
2025-10-14 20:06 ` Richard Henderson [this message]
2025-10-20 12:41 ` [PATCH v2 15/37] migration: Add vmstate_info_int128 Peter Maydell
2025-10-14 20:06 ` [PATCH v2 16/37] target/arm: Migrate cpreg128 registers Richard Henderson
2025-10-20 12:44 ` Peter Maydell
2025-10-14 20:06 ` [PATCH v2 17/37] target/arm: Add syn_aa64_sysreg128trap Richard Henderson
2025-10-20 12:45 ` Peter Maydell
2025-10-14 20:06 ` [PATCH v2 18/37] target/arm: Introduce helper_{get,set}_cp_reg128 Richard Henderson
2025-10-20 12:49 ` [PATCH v2 18/37] target/arm: Introduce helper_{get, set}_cp_reg128 Peter Maydell
2025-10-14 20:07 ` [PATCH v2 19/37] target/arm: Implement MRRS, MSRR, SYSP Richard Henderson
2025-10-20 13:15 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 20/37] target/arm: Consolidate definitions of PAR Richard Henderson
2025-10-20 13:31 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 21/37] target/arm: Extend PAR_EL1 to 128-bit Richard Henderson
2025-10-17 12:49 ` Peter Maydell
2025-10-17 19:03 ` Richard Henderson
2025-10-14 20:07 ` [PATCH v2 22/37] target/arm: Consolidate definitions of TTBR[01] Richard Henderson
2025-10-20 14:00 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 23/37] target/arm: Split out flush_if_asid_change Richard Henderson
2025-10-20 14:02 ` Peter Maydell
2025-10-20 14:12 ` Philippe Mathieu-Daudé
2025-10-14 20:07 ` [PATCH v2 24/37] target/arm: Use flush_if_asid_change in vmsa_ttbr_write Richard Henderson
2025-10-20 14:08 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 25/37] target/arm: Extend TTBR system registers to 128-bit Richard Henderson
2025-10-20 14:14 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 26/37] target/arm: Implement TLBIP IPAS2E1, IPAS2LE1 Richard Henderson
2025-10-20 14:34 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 27/37] target/arm: Implement TLBIP IPAS2E1IS, IPAS2LE1IS Richard Henderson
2025-10-20 14:35 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 28/37] target/arm: Implement TLBIP RVAE1, RVAAE1, RVALE1, RVAALE1 Richard Henderson
2025-10-20 14:48 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 29/37] target/arm: Implement TLBIP RIPAS1E1, RIPAS1LE1, RIPAS2E1IS, RIPAS2LE1IS Richard Henderson
2025-10-20 14:49 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 30/37] target/arm: Implement TLBIP RVA{L}E2{IS,OS} Richard Henderson
2025-10-20 14:50 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 31/37] target/arm: Implement TLBIP RVA{L}E3{IS,OS} Richard Henderson
2025-10-20 14:50 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 32/37] target/arm: Implement TLBIP VA{L}E1{IS,OS} Richard Henderson
2025-10-20 14:52 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 33/37] target/arm: Implement TLBIP VAE2, VALE2 Richard Henderson
2025-10-20 14:52 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 34/37] target/arm: Implement TLBIP VAE3, VALE3 Richard Henderson
2025-10-20 14:52 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 35/37] target/arm: Implement TLBIP VA{L}E2{IS,OS} Richard Henderson
2025-10-20 14:53 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 36/37] target/arm: Implement TLBIP VA{L}E3{IS,OS} Richard Henderson
2025-10-20 14:53 ` Peter Maydell
2025-10-14 20:07 ` [PATCH v2 37/37] NOTFORMERGE: Enable FEAT_SYSREG128, FEAT_SYSINSTR128 for cpu max Richard Henderson
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