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From: "Corvin Köhne" <corvin.koehne@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Kevin Wolf" <kwolf@redhat.com>,
	"Yannick Voßen" <y.vossen@beckhoff.com>,
	"Alistair Francis" <alistair@alistair23.me>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	qemu-arm@nongnu.org, "Hanna Reitz" <hreitz@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	qemu-block@nongnu.org, "Corvin Köhne" <c.koehne@beckhoff.com>,
	YannickV <Y.Vossen@beckhoff.com>
Subject: [PATCH v3 14/14] docs/system/arm: Add support for Beckhoff CX7200
Date: Wed, 15 Oct 2025 11:17:29 +0200	[thread overview]
Message-ID: <20251015091729.33761-15-corvin.koehne@gmail.com> (raw)
In-Reply-To: <20251015091729.33761-1-corvin.koehne@gmail.com>

From: YannickV <Y.Vossen@beckhoff.com>

This commit offers some documentation on the Beckhoff CX7200
qemu emulation.

Signed-off-by: YannickV <Y.Vossen@beckhoff.com>
---
 docs/system/arm/beckhoff-cx7200.rst | 57 +++++++++++++++++++++++++++++
 docs/system/target-arm.rst          |  1 +
 2 files changed, 58 insertions(+)
 create mode 100644 docs/system/arm/beckhoff-cx7200.rst

diff --git a/docs/system/arm/beckhoff-cx7200.rst b/docs/system/arm/beckhoff-cx7200.rst
new file mode 100644
index 0000000000..f060319b0f
--- /dev/null
+++ b/docs/system/arm/beckhoff-cx7200.rst
@@ -0,0 +1,57 @@
+Beckhoff CX7200 (``beckhoff-cx7200``)
+======================================
+The Beckhoff CX7200 is based on the same architecture as the Xilinx Zynq A9.
+The Zynq 7000 family is based on the AMD SoC architecture. These products
+integrate a feature-rich dual or single-core Arm Cortex-A9 MPCore based
+processing system (PS) and AMD programmable logic (PL) in a single device.
+The Beckhoff Communication Controller (CCAT) can be found in the PL of Zynq.
+
+More details here:
+https://docs.amd.com/r/en-US/ug585-zynq-7000-SoC-TRM/Zynq-7000-SoC-Technical-Reference-Manual
+https://www.beckhoff.com/de-de/produkte/ipc/embedded-pcs/cx7000-arm-r-cortex-r/cx7293.html
+
+The CX7200 supports following devices:
+    - A9 MPCORE
+        - cortex-a9
+        - GIC v1
+        - Generic timer
+        - wdt
+    - OCM 256KB
+    - SMC SRAM@0xe2000000 64MB
+    - Zynq SLCR
+    - SPI x2
+    - QSPI
+    - UART
+    - TTC x2
+    - Gigabit Ethernet Controller
+    - SD Controller
+    - XADC
+    - Arm PrimeCell DMA Controller
+    - DDR Memory
+    - DDR Controller
+    - Beckhoff Communication Controller (CCAT)
+        - EEPROM Interface
+        - DMA Controller
+
+Following devices are not supported:
+    - I2C
+
+Running
+"""""""
+Directly loading an ELF file to the CPU of the CX7200 to run f.e. TC/RTOS (based on FreeRTOS):
+
+.. code-block:: bash
+
+  $ qemu-system-arm -M beckhoff-cx7200 \
+        -device loader,file=CX7200_Zynq_Fsbl.elf \
+        -display none \
+        -icount shift=auto \
+
+
+For setting the EEPROM content of the CCAT provide the following on the command line:
+
+.. code-block:: bash
+
+        -drive file=eeprom.bin,format=raw,id=ccat-eeprom
+
+The size of eeprom.bin must be aligned to a power of 2 and bigger than 256 bytes.
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
index a96d1867df..e634872b97 100644
--- a/docs/system/target-arm.rst
+++ b/docs/system/target-arm.rst
@@ -82,6 +82,7 @@ Board-specific documentation
    arm/aspeed
    arm/bananapi_m2u.rst
    arm/b-l475e-iot01a.rst
+   arm/beckhoff-cx7200
    arm/sabrelite
    arm/highbank
    arm/digic
-- 
2.47.3



  parent reply	other threads:[~2025-10-15  9:20 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-15  9:17 [PATCH v3 00/14] hw/arm: add Beckhoff CX7200 board Corvin Köhne
2025-10-15  9:17 ` [PATCH v3 01/14] hw/timer: Make frequency configurable Corvin Köhne
2025-10-15  9:17 ` [PATCH v3 02/14] hw/timer: Make PERIPHCLK divider configurable Corvin Köhne
2025-10-15  9:17 ` [PATCH v3 03/14] hw/dma/zynq-devcfg: Handle bitstream loading via DMA to 0xffffffff Corvin Köhne
2025-10-15  9:17 ` [PATCH v3 04/14] hw/arm/zynq-devcfg: Prevent unintended unlock during initialization Corvin Köhne
2025-10-15  9:17 ` [PATCH v3 05/14] hw/dma/zynq: Ensure PCFG_DONE bit remains set to indicate PL is in user mode Corvin Köhne
2025-10-15  9:17 ` [PATCH v3 06/14] hw/dma/zynq-devcfg: Simulate dummy PL reset Corvin Köhne
2025-10-15  9:17 ` [PATCH v3 07/14] hw/dma/zynq-devcfg: Indicate power-up status of PL Corvin Köhne
2025-10-15  9:17 ` [PATCH v3 08/14] hw/dma/zynq-devcfg: Fix register memory Corvin Köhne
2025-10-15  9:17 ` [PATCH v3 09/14] hw/misc: Add dummy ZYNQ DDR controller Corvin Köhne
2025-10-15  9:17 ` [PATCH v3 10/14] hw/misc/zynq_slcr: Add logic for DCI configuration Corvin Köhne
2025-10-15  9:17 ` [PATCH v3 11/14] hw/misc: Add Beckhoff CCAT device Corvin Köhne
2025-10-15  9:17 ` [PATCH v3 12/14] hw/block/m25p80: Add HAS_SR_TB flag for is25lp016d Corvin Köhne
2025-10-15  9:17 ` [PATCH v3 13/14] hw/arm: Add new machine based on xilinx-zynq-a9 for Beckhoff CX7200 Corvin Köhne
2025-10-15  9:17 ` Corvin Köhne [this message]
2025-10-23 12:25 ` [PATCH v3 00/14] hw/arm: add Beckhoff CX7200 board Peter Maydell
2025-10-23 12:26   ` Peter Maydell

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