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From: Zhenzhong Duan <zhenzhong.duan@intel.com>
To: qemu-devel@nongnu.org
Cc: mst@redhat.com, jasowang@redhat.com, peterx@redhat.com,
	yi.l.liu@intel.com, clement.mathieu--drif@eviden.com,
	Zhenzhong Duan <zhenzhong.duan@intel.com>
Subject: [PATCH 0/3] Fix DMA failure when there is domain switch in
Date: Wed, 15 Oct 2025 06:19:59 -0400	[thread overview]
Message-ID: <20251015102003.279239-1-zhenzhong.duan@intel.com> (raw)

Hi,

This fixes an DMA failure issue in guest when user switch domain
manually. E.g., echo [DMA|identity] > /sys/kernel/iommu_groups/6/type

First two patches come from [PATCH v6 00/22] intel_iommu: Enable first stage translation for passthrough device
which added basic support for pasid cache invalidation, the 3rd patch
add a fix.

Thanks
Zhenzhong

Zhenzhong Duan (3):
  intel_iommu: Handle PASID cache invalidation
  intel_iommu: Reset pasid cache when system level reset
  intel_iommu: Fix DMA failure when guest switches IOMMU domain

 hw/i386/intel_iommu_internal.h |  20 +++-
 include/hw/i386/intel_iommu.h  |   6 ++
 hw/i386/intel_iommu.c          | 168 ++++++++++++++++++++++++++++++---
 hw/i386/trace-events           |   4 +
 4 files changed, 185 insertions(+), 13 deletions(-)

-- 
2.47.1



             reply	other threads:[~2025-10-15 10:21 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-15 10:19 Zhenzhong Duan [this message]
2025-10-15 10:20 ` [PATCH 1/3] intel_iommu: Handle PASID cache invalidation Zhenzhong Duan
2025-10-15 12:38   ` Yi Liu
2025-10-16  2:45     ` Duan, Zhenzhong
2025-10-15 10:20 ` [PATCH 2/3] intel_iommu: Reset pasid cache when system level reset Zhenzhong Duan
2025-10-15 10:20 ` [PATCH 3/3] intel_iommu: Fix DMA failure when guest switches IOMMU domain Zhenzhong Duan
2025-10-15 12:42   ` Yi Liu
2025-10-16  3:14     ` Duan, Zhenzhong

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