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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Anton Johansson" <anjo@rev.ng>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v2 1/7] target/microblaze: Remove target_ulong use in cpu_handle_mmu_fault()
Date: Wed, 15 Oct 2025 19:57:11 +0200	[thread overview]
Message-ID: <20251015175717.93945-2-philmd@linaro.org> (raw)
In-Reply-To: <20251015175717.93945-1-philmd@linaro.org>

cpu_handle_mmu_fault() -- renamed in commit f429d607c71 -- expects
a vaddr type for its address argument since commit 7510454e3e7
("cpu: Turn cpu_handle_mmu_fault() into a CPUClass hook").

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
 target/microblaze/mmu.h | 2 +-
 target/microblaze/mmu.c | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/microblaze/mmu.h b/target/microblaze/mmu.h
index 1068bd2d52b..2aca39c923b 100644
--- a/target/microblaze/mmu.h
+++ b/target/microblaze/mmu.h
@@ -86,7 +86,7 @@ typedef struct {
 } MicroBlazeMMULookup;
 
 unsigned int mmu_translate(MicroBlazeCPU *cpu, MicroBlazeMMULookup *lu,
-                           target_ulong vaddr, MMUAccessType rw, int mmu_idx);
+                           vaddr vaddr, MMUAccessType rw, int mmu_idx);
 uint32_t mmu_read(CPUMBState *env, bool ea, uint32_t rn);
 void mmu_write(CPUMBState *env, bool ea, uint32_t rn, uint32_t v);
 void mmu_init(MicroBlazeMMU *mmu);
diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c
index 8703ff5c657..db24cb399ce 100644
--- a/target/microblaze/mmu.c
+++ b/target/microblaze/mmu.c
@@ -78,7 +78,7 @@ static void mmu_change_pid(CPUMBState *env, unsigned int newpid)
 
 /* rw - 0 = read, 1 = write, 2 = fetch.  */
 unsigned int mmu_translate(MicroBlazeCPU *cpu, MicroBlazeMMULookup *lu,
-                           target_ulong vaddr, MMUAccessType rw, int mmu_idx)
+                           vaddr vaddr, MMUAccessType rw, int mmu_idx)
 {
     MicroBlazeMMU *mmu = &cpu->env.mmu;
     unsigned int i, hit = 0;
@@ -172,7 +172,7 @@ unsigned int mmu_translate(MicroBlazeCPU *cpu, MicroBlazeMMULookup *lu,
     }
 done:
     qemu_log_mask(CPU_LOG_MMU,
-                  "MMU vaddr=0x" TARGET_FMT_lx
+                  "MMU vaddr=0x%" VADDR_PRIx
                   " rw=%d tlb_wr=%d tlb_ex=%d hit=%d\n",
                   vaddr, rw, tlb_wr, tlb_ex, hit);
     return hit;
-- 
2.51.0



  reply	other threads:[~2025-10-15 17:58 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-15 17:57 [PATCH v2 0/7] target/microblaze: Remove all uses of target_ulong type Philippe Mathieu-Daudé
2025-10-15 17:57 ` Philippe Mathieu-Daudé [this message]
2025-10-15 17:57 ` [PATCH v2 2/7] target/microblaze: Remove target_ulong uses in get_phys_page_attrs_debug Philippe Mathieu-Daudé
2025-10-15 17:57 ` [PATCH v2 3/7] target/microblaze: Remove target_ulong use in gen_goto_tb() Philippe Mathieu-Daudé
2025-10-15 17:57 ` [PATCH v2 4/7] target/microblaze: Remove target_ulong use in helper_stackprot() Philippe Mathieu-Daudé
2025-10-15 17:57 ` [PATCH v2 5/7] target/microblaze: Have compute_ldst_addr_type[ab] return TCG_i32 Philippe Mathieu-Daudé
2025-10-15 17:59   ` Philippe Mathieu-Daudé
2025-10-15 17:57 ` [PATCH v2 6/7] target/microblaze: Have do_load/store() take a TCG_i32 address argument Philippe Mathieu-Daudé
2025-10-15 17:57 ` [PATCH v2 7/7] target/microblaze: Convert CPUMBState::res_addr field to uint32_t type Philippe Mathieu-Daudé

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