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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Anton Johansson" <anjo@rev.ng>,
	"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v3 6/7] target/microblaze: Have do_load/store() take a TCG_i32 address argument
Date: Wed, 15 Oct 2025 20:01:14 +0200	[thread overview]
Message-ID: <20251015180115.97493-7-philmd@linaro.org> (raw)
In-Reply-To: <20251015180115.97493-1-philmd@linaro.org>

All callers of do_load() and do_store() pass a TCG_i32 address
type, have both functions take a TCG_i32.

Suggested-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/microblaze/translate.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 1554b9e67b0..ed53848bad5 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -708,7 +708,7 @@ static inline MemOp mo_endian(DisasContext *dc)
     return dc->cfg->endi ? MO_LE : MO_BE;
 }
 
-static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop,
+static bool do_load(DisasContext *dc, int rd, TCGv_i32 addr, MemOp mop,
                     int mem_index, bool rev)
 {
     MemOp size = mop & MO_SIZE;
@@ -726,7 +726,7 @@ static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop,
             mop ^= MO_BSWAP;
         }
         if (size < MO_32) {
-            tcg_gen_xori_tl(addr, addr, 3 - size);
+            tcg_gen_xori_i32(addr, addr, 3 - size);
         }
     }
 
@@ -868,7 +868,7 @@ static bool trans_lwx(DisasContext *dc, arg_typea *arg)
     return true;
 }
 
-static bool do_store(DisasContext *dc, int rd, TCGv addr, MemOp mop,
+static bool do_store(DisasContext *dc, int rd, TCGv_i32 addr, MemOp mop,
                      int mem_index, bool rev)
 {
     MemOp size = mop & MO_SIZE;
@@ -886,7 +886,7 @@ static bool do_store(DisasContext *dc, int rd, TCGv addr, MemOp mop,
             mop ^= MO_BSWAP;
         }
         if (size < MO_32) {
-            tcg_gen_xori_tl(addr, addr, 3 - size);
+            tcg_gen_xori_i32(addr, addr, 3 - size);
         }
     }
 
-- 
2.51.0



  parent reply	other threads:[~2025-10-15 18:02 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-15 18:01 [PATCH v3 0/7] target/microblaze: Remove all uses of target_ulong type Philippe Mathieu-Daudé
2025-10-15 18:01 ` [PATCH v3 1/7] target/microblaze: Remove target_ulong use in cpu_handle_mmu_fault() Philippe Mathieu-Daudé
2025-10-15 18:21   ` Richard Henderson
2025-10-15 18:01 ` [PATCH v3 2/7] target/microblaze: Remove target_ulong uses in get_phys_page_attrs_debug Philippe Mathieu-Daudé
2025-10-15 18:21   ` Richard Henderson
2025-10-15 18:01 ` [PATCH v3 3/7] target/microblaze: Remove target_ulong use in gen_goto_tb() Philippe Mathieu-Daudé
2025-10-15 18:22   ` Richard Henderson
2025-10-15 18:01 ` [PATCH v3 4/7] target/microblaze: Remove target_ulong use in helper_stackprot() Philippe Mathieu-Daudé
2025-10-15 18:23   ` Richard Henderson
2025-10-15 18:01 ` [PATCH v3 5/7] target/microblaze: Have compute_ldst_addr_type[ab] return TCG_i32 Philippe Mathieu-Daudé
2025-10-15 18:02   ` Pierrick Bouvier
2025-10-15 18:23   ` Richard Henderson
2025-10-15 18:01 ` Philippe Mathieu-Daudé [this message]
2025-10-15 18:02   ` [PATCH v3 6/7] target/microblaze: Have do_load/store() take a TCG_i32 address argument Pierrick Bouvier
2025-10-15 18:24   ` Richard Henderson
2025-10-15 18:01 ` [PATCH v3 7/7] target/microblaze: Convert CPUMBState::res_addr field to uint32_t type Philippe Mathieu-Daudé
2025-10-15 18:25   ` Richard Henderson
2025-10-16 12:15 ` [PATCH v3 0/7] target/microblaze: Remove all uses of target_ulong type Philippe Mathieu-Daudé

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