From: Mohamed Mediouni <mohamed@unpredictable.fr>
To: qemu-devel@nongnu.org
Cc: "Alexander Graf" <agraf@csgraf.de>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Cameron Esfahani" <dirty@apple.com>,
"Mads Ynddal" <mads@ynddal.dk>,
qemu-arm@nongnu.org, "Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Ani Sinha" <anisinha@redhat.com>,
"Phil Dennis-Jordan" <phil@philjordan.eu>,
"Mohamed Mediouni" <mohamed@unpredictable.fr>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Sunil Muthuswamy" <sunilmut@microsoft.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Daniel P. Berrangé" <berrange@redhat.com>,
"Shannon Zhao" <shannon.zhaosl@gmail.com>,
kvm@vger.kernel.org, "Peter Maydell" <peter.maydell@linaro.org>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Pedro Barbuda" <pbarbuda@microsoft.com>,
"Zhao Liu" <zhao1.liu@intel.com>,
"Roman Bolshakov" <rbolshakov@ddn.com>,
"Pierrick Bouvier" <pierrick.bouvier@linaro.org>
Subject: [PATCH v7 17/24] whpx: arm64: clamp down IPA size
Date: Thu, 16 Oct 2025 18:55:13 +0200 [thread overview]
Message-ID: <20251016165520.62532-18-mohamed@unpredictable.fr> (raw)
In-Reply-To: <20251016165520.62532-1-mohamed@unpredictable.fr>
Code taken from HVF and adapted for WHPX use. Note that WHPX doesn't
have a default vs maximum IPA distinction.
Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
---
hw/arm/virt.c | 32 ++++++++++++++++++++++++++
include/hw/boards.h | 1 +
target/arm/whpx/meson.build | 2 ++
target/arm/whpx/whpx-all.c | 45 +++++++++++++++++++++++++++++++++++++
target/arm/whpx/whpx-stub.c | 15 +++++++++++++
target/arm/whpx_arm.h | 16 +++++++++++++
6 files changed, 111 insertions(+)
create mode 100644 target/arm/whpx/whpx-stub.c
create mode 100644 target/arm/whpx_arm.h
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 1bebbc265d..b6b3e37f33 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -70,6 +70,7 @@
#include "hw/irq.h"
#include "kvm_arm.h"
#include "hvf_arm.h"
+#include "whpx_arm.h"
#include "hw/firmware/smbios.h"
#include "qapi/visitor.h"
#include "qapi/qapi-visit-common.h"
@@ -3257,6 +3258,36 @@ static int virt_kvm_type(MachineState *ms, const char *type_str)
return fixed_ipa ? 0 : requested_pa_size;
}
+static int virt_whpx_get_physical_address_range(MachineState *ms)
+{
+ VirtMachineState *vms = VIRT_MACHINE(ms);
+
+ int max_ipa_size = whpx_arm_get_ipa_bit_size();
+
+ /* We freeze the memory map to compute the highest gpa */
+ virt_set_memmap(vms, max_ipa_size);
+
+ int requested_ipa_size = 64 - clz64(vms->highest_gpa);
+
+ /*
+ * If we're <= the default IPA size just use the default.
+ * If we're above the default but below the maximum, round up to
+ * the maximum. hvf_arm_get_max_ipa_bit_size() conveniently only
+ * returns values that are valid ARM PARange values.
+ */
+ if (requested_ipa_size <= max_ipa_size) {
+ requested_ipa_size = max_ipa_size;
+ } else {
+ error_report("-m and ,maxmem option values "
+ "require an IPA range (%d bits) larger than "
+ "the one supported by the host (%d bits)",
+ requested_ipa_size, max_ipa_size);
+ return -1;
+ }
+
+ return requested_ipa_size;
+}
+
static int virt_hvf_get_physical_address_range(MachineState *ms)
{
VirtMachineState *vms = VIRT_MACHINE(ms);
@@ -3349,6 +3380,7 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
mc->get_default_cpu_node_id = virt_get_default_cpu_node_id;
mc->kvm_type = virt_kvm_type;
mc->hvf_get_physical_address_range = virt_hvf_get_physical_address_range;
+ mc->whpx_get_physical_address_range = virt_whpx_get_physical_address_range;
assert(!mc->get_hotplug_handler);
mc->get_hotplug_handler = virt_machine_get_hotplug_handler;
hc->pre_plug = virt_machine_device_pre_plug_cb;
diff --git a/include/hw/boards.h b/include/hw/boards.h
index 665b620121..3d01fb8cc9 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -276,6 +276,7 @@ struct MachineClass {
void (*wakeup)(MachineState *state);
int (*kvm_type)(MachineState *machine, const char *arg);
int (*hvf_get_physical_address_range)(MachineState *machine);
+ int (*whpx_get_physical_address_range)(MachineState *machine);
BlockInterfaceType block_default_type;
int units_per_default_bus;
diff --git a/target/arm/whpx/meson.build b/target/arm/whpx/meson.build
index 1de2ef0283..3df632c9d3 100644
--- a/target/arm/whpx/meson.build
+++ b/target/arm/whpx/meson.build
@@ -1,3 +1,5 @@
arm_system_ss.add(when: 'CONFIG_WHPX', if_true: files(
'whpx-all.c',
))
+
+arm_common_system_ss.add(when: 'CONFIG_WHPX', if_false: files('whpx-stub.c'))
diff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c
index 7ef900a5ca..62fd6c230a 100644
--- a/target/arm/whpx/whpx-all.c
+++ b/target/arm/whpx/whpx-all.c
@@ -35,6 +35,7 @@
#include "system/whpx-accel-ops.h"
#include "system/whpx-all.h"
#include "system/whpx-common.h"
+#include "whpx_arm.h"
#include "hw/arm/bsa.h"
#include "arm-powerctl.h"
@@ -660,6 +661,40 @@ static void whpx_cpu_update_state(void *opaque, bool running, RunState state)
{
}
+uint32_t whpx_arm_get_ipa_bit_size(void)
+{
+ WHV_CAPABILITY whpx_cap;
+ UINT32 whpx_cap_size;
+ HRESULT hr;
+ hr = whp_dispatch.WHvGetCapability(
+ WHvCapabilityCodePhysicalAddressWidth, &whpx_cap,
+ sizeof(whpx_cap), &whpx_cap_size);
+ if (FAILED(hr)) {
+ error_report("WHPX: failed to get supported"
+ "physical address width, hr=%08lx", hr);
+ }
+
+ /*
+ * We clamp any IPA size we want to back the VM with to a valid PARange
+ * value so the guest doesn't try and map memory outside of the valid range.
+ * This logic just clamps the passed in IPA bit size to the first valid
+ * PARange value <= to it.
+ */
+ return round_down_to_parange_bit_size(whpx_cap.PhysicalAddressWidth);
+}
+
+static void clamp_id_aa64mmfr0_parange_to_ipa_size(ARMISARegisters *isar)
+{
+ uint32_t ipa_size = whpx_arm_get_ipa_bit_size();
+ uint64_t id_aa64mmfr0;
+
+ /* Clamp down the PARange to the IPA size the kernel supports. */
+ uint8_t index = round_down_to_parange_index(ipa_size);
+ id_aa64mmfr0 = GET_IDREG(isar, ID_AA64MMFR0);
+ id_aa64mmfr0 = (id_aa64mmfr0 & ~R_ID_AA64MMFR0_PARANGE_MASK) | index;
+ SET_IDREG(isar, ID_AA64MMFR0, id_aa64mmfr0);
+}
+
int whpx_init_vcpu(CPUState *cpu)
{
HRESULT hr;
@@ -738,6 +773,7 @@ int whpx_init_vcpu(CPUState *cpu)
val.Reg64 = deposit64(arm_cpu->mp_affinity, 31, 1, 1 /* RES1 */);
whpx_set_reg(cpu, WHvArm64RegisterMpidrEl1, val);
+ clamp_id_aa64mmfr0_parange_to_ipa_size(&arm_cpu->isar);
return 0;
error:
@@ -760,6 +796,8 @@ int whpx_accel_init(AccelState *as, MachineState *ms)
UINT32 whpx_cap_size;
WHV_PARTITION_PROPERTY prop;
WHV_CAPABILITY_FEATURES features = {0};
+ MachineClass *mc = MACHINE_GET_CLASS(ms);
+ int pa_range = 0;
whpx = &whpx_global;
/* on arm64 Windows Hypervisor Platform, vGICv3 always used */
@@ -770,6 +808,13 @@ int whpx_accel_init(AccelState *as, MachineState *ms)
goto error;
}
+ if (mc->whpx_get_physical_address_range) {
+ pa_range = mc->whpx_get_physical_address_range(ms);
+ if (pa_range < 0) {
+ return -EINVAL;
+ }
+ }
+
whpx->mem_quota = ms->ram_size;
hr = whp_dispatch.WHvGetCapability(
diff --git a/target/arm/whpx/whpx-stub.c b/target/arm/whpx/whpx-stub.c
new file mode 100644
index 0000000000..32e434a5f6
--- /dev/null
+++ b/target/arm/whpx/whpx-stub.c
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * WHPX stubs for ARM
+ *
+ * Copyright (c) 2025 Mohamed Mediouni
+ *
+ */
+
+#include "qemu/osdep.h"
+#include "whpx_arm.h"
+
+uint32_t whpx_arm_get_ipa_bit_size(void)
+{
+ g_assert_not_reached();
+}
diff --git a/target/arm/whpx_arm.h b/target/arm/whpx_arm.h
new file mode 100644
index 0000000000..de7406b66f
--- /dev/null
+++ b/target/arm/whpx_arm.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * WHPX support -- ARM specifics
+ *
+ * Copyright (c) 2025 Mohamed Mediouni
+ *
+ */
+
+#ifndef QEMU_WHPX_ARM_H
+#define QEMU_WHPX_ARM_H
+
+#include "target/arm/cpu-qom.h"
+
+uint32_t whpx_arm_get_ipa_bit_size(void);
+
+#endif
--
2.50.1 (Apple Git-155)
next prev parent reply other threads:[~2025-10-16 17:00 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-16 16:54 [PATCH v7 00/24] WHPX support for Arm Mohamed Mediouni
2025-10-16 16:54 ` [PATCH v7 01/24] target/arm/kvm: add constants for new PSCI versions Mohamed Mediouni
2025-10-16 17:07 ` Pierrick Bouvier
2025-10-16 16:54 ` [PATCH v7 02/24] accel/system: Introduce hwaccel_enabled() helper Mohamed Mediouni
2025-10-16 16:54 ` [PATCH v7 03/24] qtest: hw/arm: virt: skip ACPI test for ITS off Mohamed Mediouni
2025-10-16 17:08 ` Pierrick Bouvier
2025-10-16 16:55 ` [PATCH v7 04/24] hw/arm: virt: add GICv2m for the case when ITS is not available Mohamed Mediouni
2025-10-16 17:09 ` Pierrick Bouvier
2025-10-16 16:55 ` [PATCH v7 05/24] tests: data: update AArch64 ACPI tables Mohamed Mediouni
2025-10-16 17:10 ` Pierrick Bouvier
2025-10-16 16:55 ` [PATCH v7 06/24] whpx: Move around files before introducing AArch64 support Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 07/24] whpx: reshuffle common code Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 08/24] whpx: ifdef out winhvemulation on non-x86_64 Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 09/24] whpx: common: add WHPX_INTERCEPT_DEBUG_TRAPS define Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 10/24] hw, target, accel: whpx: change apic_in_platform to kernel_irqchip Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 11/24] whpx: interrupt controller support Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 12/24] whpx: add arm64 support Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 13/24] whpx: copy over memory management logic from hvf Mohamed Mediouni
2025-10-22 18:55 ` Philippe Mathieu-Daudé
2025-10-16 16:55 ` [PATCH v7 14/24] target/arm: cpu: mark WHPX as supporting PSCI 1.3 Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 15/24] hw/arm: virt: cleanly fail on attempt to use the platform vGIC together with ITS Mohamed Mediouni
2025-10-16 17:10 ` Pierrick Bouvier
2025-10-16 18:19 ` Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 16/24] docs: arm: update virt machine model description Mohamed Mediouni
2025-10-16 17:11 ` Pierrick Bouvier
2025-10-16 16:55 ` Mohamed Mediouni [this message]
2025-10-16 16:55 ` [PATCH v7 18/24] hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX and HVF Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 19/24] whpx: arm64: implement -cpu host Mohamed Mediouni
2025-10-16 17:12 ` Pierrick Bouvier
2025-10-16 16:55 ` [PATCH v7 20/24] target/arm: whpx: instantiate GIC early Mohamed Mediouni
2025-10-16 16:55 ` [PATCH v7 21/24] whpx: arm64: gicv3: add migration blocker Mohamed Mediouni
2025-10-16 17:14 ` Pierrick Bouvier
2025-10-16 16:55 ` [PATCH v7 22/24] whpx: enable arm64 builds Mohamed Mediouni
2025-10-16 17:14 ` Pierrick Bouvier
2025-10-16 16:55 ` [PATCH v7 23/24] MAINTAINERS: update maintainers for WHPX Mohamed Mediouni
2025-10-16 17:15 ` Pierrick Bouvier
2025-10-16 16:55 ` [PATCH v7 24/24] whpx: apic: use non-deprecated APIs to control interrupt controller state Mohamed Mediouni
2025-10-16 17:15 ` Pierrick Bouvier
2025-10-20 10:27 ` Bernhard Beschow
2025-10-23 6:33 ` Philippe Mathieu-Daudé
2025-10-23 8:47 ` Pierrick Bouvier
2025-10-23 9:23 ` Bernhard Beschow
2025-10-23 17:02 ` Bernhard Beschow
2025-10-27 7:55 ` Pierrick Bouvier
2025-10-17 9:59 ` [PATCH v7 00/24] WHPX support for Arm Peter Maydell
2025-10-17 10:56 ` Mohamed Mediouni
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