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[2.245.26.170]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-63c4945f003sm5107655a12.27.2025.10.19.14.03.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Oct 2025 14:03:26 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Marcel Apfelbaum , Laurent Vivier , "Michael S. Tsirkin" , Eduardo Habkost , Zhao Liu , kvm@vger.kernel.org, Michael Tokarev , Cameron Esfahani , qemu-block@nongnu.org, Paolo Bonzini , qemu-trivial@nongnu.org, Laurent Vivier , Richard Henderson , Roman Bolshakov , Phil Dennis-Jordan , John Snow , Fabiano Rosas , Gerd Hoffmann , Sunil Muthuswamy , Marcelo Tosatti , Bernhard Beschow Subject: [PATCH v3 01/10] hw/timer/i8254: Add I/O trace events Date: Sun, 19 Oct 2025 23:02:54 +0200 Message-ID: <20251019210303.104718-2-shentey@gmail.com> X-Mailer: git-send-email 2.51.1.dirty In-Reply-To: <20251019210303.104718-1-shentey@gmail.com> References: <20251019210303.104718-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=shentey@gmail.com; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Allows to see how the guest interacts with the device. Signed-off-by: Bernhard Beschow --- hw/timer/i8254.c | 6 ++++++ hw/timer/trace-events | 4 ++++ 2 files changed, 10 insertions(+) diff --git a/hw/timer/i8254.c b/hw/timer/i8254.c index 4b25c487f7..7033ebf50d 100644 --- a/hw/timer/i8254.c +++ b/hw/timer/i8254.c @@ -29,6 +29,7 @@ #include "hw/timer/i8254.h" #include "hw/timer/i8254_internal.h" #include "qom/object.h" +#include "trace.h" //#define DEBUG_PIT @@ -130,6 +131,8 @@ static void pit_ioport_write(void *opaque, hwaddr addr, int channel, access; PITChannelState *s; + trace_pit_ioport_write(addr, val); + addr &= 3; if (addr == 3) { channel = val >> 6; @@ -248,6 +251,9 @@ static uint64_t pit_ioport_read(void *opaque, hwaddr addr, break; } } + + trace_pit_ioport_read(addr, ret); + return ret; } diff --git a/hw/timer/trace-events b/hw/timer/trace-events index c5b6db49f5..2bb51f95ea 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -49,6 +49,10 @@ cmsdk_apb_dualtimer_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK A cmsdk_apb_dualtimer_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB dualtimer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" cmsdk_apb_dualtimer_reset(void) "CMSDK APB dualtimer: reset" +# i8254.c +pit_ioport_read(uint8_t addr, uint32_t value) "[0x%" PRIx8 "] -> 0x%" PRIx32 +pit_ioport_write(uint8_t addr, uint32_t value) "[0x%" PRIx8 "] <- 0x%" PRIx32 + # imx_gpt.c imx_gpt_set_freq(uint32_t clksrc, uint32_t freq) "Setting clksrc %u to %u Hz" imx_gpt_read(const char *name, uint64_t value) "%s -> 0x%08" PRIx64 -- 2.51.1.dirty