qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 17/45] hw/core/register: remove the REGISTER device type
Date: Tue, 21 Oct 2025 22:46:31 +0200	[thread overview]
Message-ID: <20251021204700.56072-18-philmd@linaro.org> (raw)
In-Reply-To: <20251021204700.56072-1-philmd@linaro.org>

From: Luc Michel <luc.michel@amd.com>

The REGISTER class (RegisterInfo struct) is currently a QOM type
inheriting from DEVICE. This class has no real purpose:
   - the qdev API is not used,
   - according to the comment preceding it, the object_initialize call
     is here to zero-initialize the struct. However all the effective
     struct attributes are then initialized explicitly.
   - the object is never parented.

This commits drops the REGISTER QOM type completely, leaving the
RegisterInfo struct as a bare C struct.

The register_register_types function is left empty here because it is
reused in the next commit.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Signed-off-by: Luc Michel <luc.michel@amd.com>
Message-ID: <20251017161809.235740-2-luc.michel@amd.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/register.h          |  7 -------
 hw/core/register.c             | 18 ------------------
 hw/net/can/xlnx-versal-canfd.c |  2 --
 3 files changed, 27 deletions(-)

diff --git a/include/hw/register.h b/include/hw/register.h
index a913c52aee5..4d13ea183c7 100644
--- a/include/hw/register.h
+++ b/include/hw/register.h
@@ -75,10 +75,6 @@ struct RegisterAccessInfo {
  */
 
 struct RegisterInfo {
-    /* <private> */
-    DeviceState parent_obj;
-
-    /* <public> */
     void *data;
     int data_size;
 
@@ -87,9 +83,6 @@ struct RegisterInfo {
     void *opaque;
 };
 
-#define TYPE_REGISTER "qemu-register"
-DECLARE_INSTANCE_CHECKER(RegisterInfo, REGISTER,
-                         TYPE_REGISTER)
 
 /**
  * This structure is used to group all of the individual registers which are
diff --git a/hw/core/register.c b/hw/core/register.c
index 3340df70b06..2553cb15aba 100644
--- a/hw/core/register.c
+++ b/hw/core/register.c
@@ -258,9 +258,6 @@ static RegisterInfoArray *register_init_block(DeviceState *owner,
         int index = rae[i].addr / data_size;
         RegisterInfo *r = &ri[index];
 
-        /* Init the register, this will zero it. */
-        object_initialize((void *)r, sizeof(*r), TYPE_REGISTER);
-
         /* Set the properties of the register */
         r->data = data + data_size * index;
         r->data_size = data_size;
@@ -318,24 +315,9 @@ void register_finalize_block(RegisterInfoArray *r_array)
     g_free(r_array);
 }
 
-static void register_class_init(ObjectClass *oc, const void *data)
-{
-    DeviceClass *dc = DEVICE_CLASS(oc);
-
-    /* Reason: needs to be wired up to work */
-    dc->user_creatable = false;
-}
-
-static const TypeInfo register_info = {
-    .name  = TYPE_REGISTER,
-    .parent = TYPE_DEVICE,
-    .class_init = register_class_init,
-    .instance_size = sizeof(RegisterInfo),
-};
 
 static void register_register_types(void)
 {
-    type_register_static(&register_info);
 }
 
 type_init(register_register_types)
diff --git a/hw/net/can/xlnx-versal-canfd.c b/hw/net/can/xlnx-versal-canfd.c
index 343348660b5..99bbdd7d3fe 100644
--- a/hw/net/can/xlnx-versal-canfd.c
+++ b/hw/net/can/xlnx-versal-canfd.c
@@ -1868,8 +1868,6 @@ static int canfd_populate_regarray(XlnxVersalCANFDState *s,
         int index = rae[i].addr / 4;
         RegisterInfo *r = &s->reg_info[index];
 
-        object_initialize(r, sizeof(*r), TYPE_REGISTER);
-
         *r = (RegisterInfo) {
             .data = &s->regs[index],
             .data_size = sizeof(uint32_t),
-- 
2.51.0



  parent reply	other threads:[~2025-10-21 20:52 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-21 20:46 [PULL 00/45] Misc HW patches for 2025-10-21 Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 01/45] hw/virtio/virtio-mem: Convert VIRTIO_MEM_USABLE_EXTENT to runtime Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 02/45] hw/virtio/virtio-mem: Convert VIRTIO_MEM_HAS_LEGACY_GUESTS " Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 03/45] hw/virtio: Compile virtio-mem.c once Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 04/45] hw/pci-host/raven: Simplify direct config access address decoding Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 05/45] hw/pci-host/raven: Rename direct config access ops Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 06/45] hw/pci-host/raven: Use correct parameter in direct " Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 07/45] hw/core: Filter machine list available for a particular target binary Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 08/45] hw/core/machine: Allow dynamic registration of valid CPU types Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 09/45] hw/core: Introduce MachineClass::get_default_cpu_type() helper Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 10/45] hw/boards: Move DEFINE_MACHINE() definition closer to its doc string Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 11/45] hw/boards: Extend DEFINE_MACHINE macro to cover more use cases Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 12/45] hw/boards: Introduce DEFINE_MACHINE_WITH_INTERFACE_ARRAY() macro Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 13/45] hw/i2c/smbus_eeprom: Add minimum write recovery time for DDR2 Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 14/45] hw/ppc/e500: Check for compatible CPU type instead of aborting ungracefully Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 15/45] hw/openrisc/openrisc_sim: Avoid buffer overflow build error Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 16/45] hw/xen: pass PCI domain to xc_physdev_map_pirq_msi() Philippe Mathieu-Daudé
2025-10-21 20:46 ` Philippe Mathieu-Daudé [this message]
2025-10-21 20:46 ` [PULL 18/45] hw/core/register: add the REGISTER_ARRAY type Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 19/45] hw/core/register: remove the calls to `register_finalize_block' Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 20/45] hw/core/register: remove the `register_finalize_block' function Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 21/45] hw/net/can/xlnx-versal-canfd: refactor the banked registers logic Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 22/45] hw/net/can/xlnx-versal-canfd: remove register API usage for banked regs Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 23/45] hw/ppc/prep: Always create prep-systemio Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 24/45] hw/timer/i8254: Add I/O trace events Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 25/45] hw/audio/pcspk: " Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 26/45] hw/rtc/mc146818rtc: Convert CMOS_DPRINTF() into " Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 27/45] hw/rtc/mc146818rtc: Use ARRAY_SIZE macro Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 28/45] hw/rtc/mc146818rtc: Assert correct usage of mc146818rtc_set_cmos_data() Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 29/45] hw/ide/ide-internal: Move dma_buf_commit() into ide "namespace" Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 30/45] hw/i386/apic: Prefer APICCommonState over DeviceState Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 31/45] hw/i386/apic: Ensure own APIC use in apic_msr_{read, write} Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 32/45] hw/intc/apic: Pass APICCommonState to apic_register_{read, write} Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 33/45] tests/qtest/ds1338-test: Reuse from_bcd() Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 34/45] hw/audio: improve error reports Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 35/45] hw/audio: rename model list function Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 36/45] hw/audio: remove global pcspk Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 37/45] hw/pcspk: use explicitly the required PIT types Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 38/45] hw/pcspk: make 'pit' a class property Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 39/45] hw/pcspk: check the "pit" is set Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 40/45] hw/audio: replace AUD_log() usage Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 41/45] hw/ppc/spapr: Rename resize_hpt_err to errp Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 42/45] qemu/target-info: Include missing 'qapi-types-common.h' header Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 43/45] MAINTAINERS: Add missing machine name in the Alpha section Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 44/45] docs: update -soundhw -> -device list Philippe Mathieu-Daudé
2025-10-21 20:46 ` [PULL 45/45] docs: Update mentions of removed '-soundhw' command line option Philippe Mathieu-Daudé
2025-10-22 14:29 ` [PULL 00/45] Misc HW patches for 2025-10-21 Richard Henderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20251021204700.56072-18-philmd@linaro.org \
    --to=philmd@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).