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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-475c427f77bsm10042785e9.3.2025.10.21.13.47.40 for (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 21 Oct 2025 13:47:40 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL 08/45] hw/core/machine: Allow dynamic registration of valid CPU types Date: Tue, 21 Oct 2025 22:46:22 +0200 Message-ID: <20251021204700.56072-9-philmd@linaro.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251021204700.56072-1-philmd@linaro.org> References: <20251021204700.56072-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add MachineClass::get_valid_cpu_types(), a helper that returns a dynamic list of CPU types. Since the helper takes a MachineState argument, we know the machine is created by the time we call it. Suggested-by: Pierrick Bouvier Reviewed-by: Pierrick Bouvier Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20251020220941.65269-4-philmd@linaro.org> --- include/hw/boards.h | 4 ++++ hw/core/machine.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/include/hw/boards.h b/include/hw/boards.h index d0a69cd490b..c45272b7414 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -253,6 +253,9 @@ typedef struct { * @smbios_memory_device_size: * Default size of memory device, * SMBIOS 3.1.0 "7.18 Memory Device (Type 17)" + * @get_valid_cpu_types: + * Returns a list of valid CPU types for this board. May be NULL + * if not needed. */ struct MachineClass { /*< private >*/ @@ -299,6 +302,7 @@ struct MachineClass { bool ignore_memory_transaction_failures; int numa_mem_align_shift; const char * const *valid_cpu_types; + GPtrArray *(*get_valid_cpu_types)(const MachineState *ms); strList *allowed_dynamic_sysbus_devices; bool auto_enable_numa_with_memhp; bool auto_enable_numa_with_memdev; diff --git a/hw/core/machine.c b/hw/core/machine.c index 7aec3916e80..cd2f1414a77 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -1570,6 +1570,8 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp) */ if (mc->valid_cpu_types) { assert(mc->valid_cpu_types[0] != NULL); + assert(!mc->get_valid_cpu_types); + for (i = 0; mc->valid_cpu_types[i]; i++) { if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) { break; @@ -1596,6 +1598,32 @@ static bool is_cpu_type_supported(const MachineState *machine, Error **errp) error_append_hint(errp, "\n"); } + return false; + } + } else if (mc->get_valid_cpu_types) { + GPtrArray *vct = mc->get_valid_cpu_types(machine); + bool valid = false; + + for (i = 0; i < vct->len; i++) { + if (object_class_dynamic_cast(oc, vct->pdata[i])) { + valid = true; + break; + } + } + + if (!valid) { + g_autofree char *requested = cpu_model_from_type(machine->cpu_type); + + error_setg(errp, "Invalid CPU model: %s", requested); + error_append_hint(errp, "The valid models are: "); + for (i = 0; i < vct->len; i++) { + g_autofree char *model = cpu_model_from_type(vct->pdata[i]); + error_append_hint(errp, "%s%s", + model, i + 1 == vct->len ? "\n" : ", "); + } + } + g_ptr_array_free(vct, true); + if (!valid) { return false; } } -- 2.51.0