From: "Cédric Le Goater" <clg@redhat.com>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Jamin Lin" <jamin_lin@aspeedtech.com>,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PULL 03/16] hw/arm/ast27x0: Add SRAM link and alias mapping for SSP coprocessor
Date: Wed, 22 Oct 2025 14:29:40 +0200 [thread overview]
Message-ID: <20251022122953.877335-4-clg@redhat.com> (raw)
In-Reply-To: <20251022122953.877335-1-clg@redhat.com>
From: Jamin Lin <jamin_lin@aspeedtech.com>
AST2700 has a 128KB SRAM, physically mapped at 0x10000000–0x1001FFFF for
the PSP (CA35) processor. The SSP coprocessor shares this same SRAM but
accesses it through a different address window at 0x70000000–0x7001FFFF.
To model this shared-memory behavior in QEMU, this commit introduces a
linked SRAM property and alias mapping between the PSP and SSP subsystems.
Changes include:
- Add a "MemoryRegion *sram" link and "MemoryRegion sram_alias" to
AspeedCoprocessorState.
- Register the new "sram" property in aspeed_coprocessor_common.c.
- In aspeed_ast27x0-fc.c, connect the SSP coprocessor’s "sram" link to
the PSP’s SRAM region.
- In aspeed_ast27x0-ssp.c, create an alias mapping for SRAM at
0x70000000 – 0x7001FFFF in the SSP’s memory map.
This ensures that the SSP can correctly access the shared SRAM contents
through its own address space while maintaining a consistent physical
backing region. It also guarantees that the SRAM is realized before the
SSP device, ensuring successful alias setup.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20251015062210.3128710-4-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/arm/aspeed_coprocessor.h | 3 ++-
hw/arm/aspeed_ast27x0-fc.c | 4 ++++
hw/arm/aspeed_ast27x0-ssp.c | 7 +++++++
hw/arm/aspeed_coprocessor_common.c | 2 ++
4 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/include/hw/arm/aspeed_coprocessor.h b/include/hw/arm/aspeed_coprocessor.h
index 0c7168a89c15..d9a5f517d7c7 100644
--- a/include/hw/arm/aspeed_coprocessor.h
+++ b/include/hw/arm/aspeed_coprocessor.h
@@ -17,7 +17,8 @@ struct AspeedCoprocessorState {
MemoryRegion *memory;
MemoryRegion sdram;
- MemoryRegion sram;
+ MemoryRegion *sram;
+ MemoryRegion sram_alias;
Clock *sysclk;
AspeedSCUState scu;
diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c
index a61ecff3909b..25e668a648fa 100644
--- a/hw/arm/aspeed_ast27x0-fc.c
+++ b/hw/arm/aspeed_ast27x0-fc.c
@@ -118,6 +118,8 @@ static bool ast2700fc_ssp_init(MachineState *machine, Error **errp)
AspeedCoprocessorState *soc;
AspeedCoprocessorClass *sc;
Ast2700FCState *s = AST2700A1FC(machine);
+ AspeedSoCState *psp = ASPEED_SOC(&s->ca35);
+
s->ssp_sysclk = clock_new(OBJECT(s), "SSP_SYSCLK");
clock_set_hz(s->ssp_sysclk, 200000000ULL);
@@ -134,6 +136,8 @@ static bool ast2700fc_ssp_init(MachineState *machine, Error **errp)
sc = ASPEED_COPROCESSOR_GET_CLASS(soc);
aspeed_soc_uart_set_chr(soc->uart, ASPEED_DEV_UART4, sc->uarts_base,
sc->uarts_num, serial_hd(1));
+ object_property_set_link(OBJECT(&s->ssp), "sram",
+ OBJECT(&psp->sram), &error_abort);
if (!qdev_realize(DEVICE(&s->ssp), NULL, errp)) {
return false;
}
diff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c
index 9f3a1933a066..66c4ef6d1b74 100644
--- a/hw/arm/aspeed_ast27x0-ssp.c
+++ b/hw/arm/aspeed_ast27x0-ssp.c
@@ -20,6 +20,7 @@
static const hwaddr aspeed_soc_ast27x0ssp_memmap[] = {
[ASPEED_DEV_SDRAM] = 0x00000000,
+ [ASPEED_DEV_SRAM] = 0x70000000,
[ASPEED_DEV_INTC] = 0x72100000,
[ASPEED_DEV_SCU] = 0x72C02000,
[ASPEED_DEV_SCUIO] = 0x74C02000,
@@ -195,6 +196,12 @@ static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp)
sc->memmap[ASPEED_DEV_SDRAM],
&s->sdram);
+ /* SRAM */
+ memory_region_init_alias(&s->sram_alias, OBJECT(s), "sram.alias",
+ s->sram, 0, memory_region_size(s->sram));
+ memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SRAM],
+ &s->sram_alias);
+
/* SCU */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
return;
diff --git a/hw/arm/aspeed_coprocessor_common.c b/hw/arm/aspeed_coprocessor_common.c
index 8a94b44f07f2..8322ad5eb544 100644
--- a/hw/arm/aspeed_coprocessor_common.c
+++ b/hw/arm/aspeed_coprocessor_common.c
@@ -25,6 +25,8 @@ static void aspeed_coprocessor_realize(DeviceState *dev, Error **errp)
static const Property aspeed_coprocessor_properties[] = {
DEFINE_PROP_LINK("memory", AspeedCoprocessorState, memory,
TYPE_MEMORY_REGION, MemoryRegion *),
+ DEFINE_PROP_LINK("sram", AspeedCoprocessorState, sram, TYPE_MEMORY_REGION,
+ MemoryRegion *),
};
static void aspeed_coprocessor_class_init(ObjectClass *oc, const void *data)
--
2.51.0
next prev parent reply other threads:[~2025-10-22 12:37 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-22 12:29 [PULL 00/16] aspeed queue Cédric Le Goater
2025-10-22 12:29 ` [PULL 01/16] hw/arm/aspeed_ast27x0-ssp: Add SDRAM region and fix naming and size to 512MB Cédric Le Goater
2025-10-22 12:29 ` [PULL 02/16] hw/arm/aspeed_ast27x0-tsp: " Cédric Le Goater
2025-10-22 12:29 ` Cédric Le Goater [this message]
2025-10-22 12:29 ` [PULL 04/16] hw/arm/ast27x0: Add SRAM link and alias mapping for TSP coprocessor Cédric Le Goater
2025-10-22 12:29 ` [PULL 05/16] hw/arm/ast27x0: Share single SCU instance across PSP, SSP, and TSP Cédric Le Goater
2025-10-22 12:29 ` [PULL 06/16] hw/arm/ast27x0: Share single UART set " Cédric Le Goater
2025-10-22 12:29 ` [PULL 07/16] hw/arm/aspeed_ast27x0-fc: Map FMC0 flash contents into CA35 boot ROM Cédric Le Goater
2025-10-22 12:29 ` [PULL 08/16] hw/arm/aspeed_ast27x0-fc: Add VBOOTROM support Cédric Le Goater
2025-10-22 12:29 ` [PULL 09/16] tests/functional/aarch64/ast2700fc: Update test ASPEED SDK v09.08 Cédric Le Goater
2025-10-22 12:29 ` [PULL 10/16] tests/functional/aarch64/ast2700fc: Add eth2 network interface check in PCIe test Cédric Le Goater
2025-10-22 12:29 ` [PULL 11/16] tests/functional/aarch64/ast2700fc: Move coprocessor image loading to common function Cédric Le Goater
2025-10-22 12:29 ` [PULL 12/16] tests/functional/aarch64/ast2700fc: Add vbootrom test Cédric Le Goater
2025-10-22 12:29 ` [PULL 13/16] hw/gpio: Add property for ASPEED GPIO in 32 bits basis Cédric Le Goater
2025-10-22 12:29 ` [PULL 14/16] tests/qtest: Add qtest for for ASPEED GPIO gpio-set property Cédric Le Goater
2025-10-22 12:29 ` [PULL 15/16] hw/arm/aspeed: ast2600-evb: Use w25q512jv flash model Cédric Le Goater
2025-10-22 12:29 ` [PULL 16/16] hw/arm/aspeed: Remove ast2700fc self-aliasing Cédric Le Goater
2025-10-22 14:31 ` [PULL 00/16] aspeed queue Richard Henderson
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