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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-475c4369b33sm99643335e9.14.2025.10.23.07.31.31 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 23 Oct 2025 07:31:32 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mads Ynddal , Alexander Graf , Stefan Hajnoczi , Richard Henderson , Phil Dennis-Jordan , qemu-arm@nongnu.org, Peter Maydell , Roman Bolshakov , Peter Collingbourne , Paolo Bonzini , Mohamed Mediouni , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Cameron Esfahani Subject: [PATCH v2 28/58] target/arm/hvf: Emulate PMU registers Date: Thu, 23 Oct 2025 16:30:49 +0200 Message-ID: <20251023143051.11195-9-philmd@linaro.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251023114638.5667-1-philmd@linaro.org> References: <20251023114638.5667-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- TODO: audit it is safe --- target/arm/hvf/hvf.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 26bafee259e..4fc92760934 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1214,6 +1214,10 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val) *val = env->cp15.c9_pmcnten; return 0; case SYSREG_PMUSERENR_EL0: + /* Call the TCG sysreg handler. This is only safe for PMU regs. */ + if (hvf_sysreg_read_cp(cpu, "PMU", reg, val)) { + return 0; + } *val = env->cp15.c9_pmuserenr; return 0; case SYSREG_PMCEID0_EL0: @@ -1505,6 +1509,10 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val) pmu_op_finish(env); return 0; case SYSREG_PMUSERENR_EL0: + /* Call the TCG sysreg handler. This is only safe for PMU regs. */ + if (hvf_sysreg_write_cp(cpu, "PMU", reg, val)) { + return 0; + } env->cp15.c9_pmuserenr = val & 0xf; return 0; case SYSREG_PMCNTENSET_EL0: -- 2.51.0