From: Zhao Liu <zhao1.liu@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
	Marcelo Tosatti <mtosatti@redhat.com>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org,
	Chao Gao <chao.gao@intel.com>, John Allen <john.allen@amd.com>,
	Babu Moger <babu.moger@amd.com>,
	Mathias Krause <minipli@grsecurity.net>,
	Dapeng Mi <dapeng1.mi@intel.com>, Zide Chen <zide.chen@intel.com>,
	Chenyi Qiang <chenyi.qiang@intel.com>,
	Xiaoyao Li <xiaoyao.li@intel.com>,
	Farrah Chen <farrah.chen@intel.com>,
	Zhao Liu <zhao1.liu@intel.com>
Subject: [PATCH v3 18/20] i386/cpu: Enable cet-ss & cet-ibt for supported CPU models
Date: Fri, 24 Oct 2025 14:56:30 +0800	[thread overview]
Message-ID: <20251024065632.1448606-19-zhao1.liu@intel.com> (raw)
In-Reply-To: <20251024065632.1448606-1-zhao1.liu@intel.com>
Add new versioned CPU models for Sapphire Rapids, Sierra Forest, Granite
Rapids and Clearwater Forest, to enable shadow stack and indirect branch
tracking.
Tested-by: Farrah Chen <farrah.chen@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
 target/i386/cpu.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 9a1001c47891..73026d5bce91 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5161,6 +5161,17 @@ static const X86CPUDefinition builtin_x86_defs[] = {
                     { /* end of list */ },
                 }
             },
+            {
+                .version = 5,
+                .note = "with cet-ss and cet-ibt",
+                .props = (PropValue[]) {
+                    { "cet-ss", "on" },
+                    { "cet-ibt", "on" },
+                    { "vmx-exit-save-cet", "on" },
+                    { "vmx-entry-load-cet", "on" },
+                    { /* end of list */ },
+                }
+            },
             { /* end of list */ }
         }
     },
@@ -5323,6 +5334,17 @@ static const X86CPUDefinition builtin_x86_defs[] = {
                     { /* end of list */ },
                 }
             },
+            {
+                .version = 4,
+                .note = "with cet-ss and cet-ibt",
+                .props = (PropValue[]) {
+                    { "cet-ss", "on" },
+                    { "cet-ibt", "on" },
+                    { "vmx-exit-save-cet", "on" },
+                    { "vmx-entry-load-cet", "on" },
+                    { /* end of list */ },
+                }
+            },
             { /* end of list */ },
         },
     },
@@ -5477,6 +5499,17 @@ static const X86CPUDefinition builtin_x86_defs[] = {
                     { /* end of list */ },
                 }
             },
+            {
+                .version = 4,
+                .note = "with cet-ss and cet-ibt",
+                .props = (PropValue[]) {
+                    { "cet-ss", "on" },
+                    { "cet-ibt", "on" },
+                    { "vmx-exit-save-cet", "on" },
+                    { "vmx-entry-load-cet", "on" },
+                    { /* end of list */ },
+                }
+            },
             { /* end of list */ },
         },
     },
@@ -5612,6 +5645,17 @@ static const X86CPUDefinition builtin_x86_defs[] = {
         .model_id = "Intel Xeon Processor (ClearwaterForest)",
         .versions = (X86CPUVersionDefinition[]) {
             { .version = 1 },
+            {
+                .version = 2,
+                .note = "with cet-ss and cet-ibt",
+                .props = (PropValue[]) {
+                    { "cet-ss", "on" },
+                    { "cet-ibt", "on" },
+                    { "vmx-exit-save-cet", "on" },
+                    { "vmx-entry-load-cet", "on" },
+                    { /* end of list */ },
+                }
+            },
             { /* end of list */ },
         },
     },
-- 
2.34.1
next prev parent reply	other threads:[~2025-10-24  6:37 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-24  6:56 [PATCH v3 00/20] i386: Support CET for KVM Zhao Liu
2025-10-24  6:56 ` [PATCH v3 01/20] linux-headers: Update to v6.18-rc2 Zhao Liu
2025-10-24  6:56 ` [PATCH v3 02/20] i386/cpu: Clean up indent style of x86_ext_save_areas[] Zhao Liu
2025-10-27  5:47   ` Xiaoyao Li
2025-10-30 15:11     ` Zhao Liu
2025-10-24  6:56 ` [PATCH v3 03/20] i386/cpu: Clean up arch lbr xsave struct and comment Zhao Liu
2025-10-24 18:20   ` Chen, Zide
2025-10-27  6:08   ` Xiaoyao Li
2025-10-24  6:56 ` [PATCH v3 04/20] i386/cpu: Reorganize arch lbr structure definitions Zhao Liu
2025-10-24 18:20   ` Chen, Zide
2025-10-27  6:22   ` Xiaoyao Li
2025-10-24  6:56 ` [PATCH v3 05/20] i386/cpu: Make ExtSaveArea store an array of dependencies Zhao Liu
2025-10-27  7:04   ` Xiaoyao Li
2025-10-27 10:09     ` Zhao Liu
2025-10-24  6:56 ` [PATCH v3 06/20] i386/cpu: Add avx10 dependency for Opmask/ZMM_Hi256/Hi16_ZMM Zhao Liu
2025-10-27  7:05   ` Xiaoyao Li
2025-10-24  6:56 ` [PATCH v3 07/20] i386/cpu: Reorganize dependency check for arch lbr state Zhao Liu
2025-10-24 18:21   ` Chen, Zide
2025-10-27  7:40   ` Xiaoyao Li
2025-10-27 10:12     ` Zhao Liu
2025-10-27 11:15       ` Xiaoyao Li
2025-10-30 15:40         ` Zhao Liu
2025-10-24  6:56 ` [PATCH v3 08/20] i386/cpu: Drop pmu check in CPUID 0x1C encoding Zhao Liu
2025-10-24 18:21   ` Chen, Zide
2025-10-27  7:51   ` Xiaoyao Li
2025-10-27 11:01     ` Zhao Liu
2025-10-24  6:56 ` [PATCH v3 09/20] i386/cpu: Fix supervisor xstate initialization Zhao Liu
2025-10-27  7:55   ` Xiaoyao Li
2025-10-27 10:13     ` Zhao Liu
2025-10-24  6:56 ` [PATCH v3 10/20] i386/cpu: Add missing migratable xsave features Zhao Liu
2025-10-27  8:42   ` Xiaoyao Li
2025-10-27 10:19     ` Zhao Liu
2025-10-27 11:18       ` Zhao Liu
2025-10-27 12:02         ` Xiaoyao Li
2025-10-30 15:56           ` Zhao Liu
2025-10-27 11:36   ` Zhao Liu
2025-10-24  6:56 ` [PATCH v3 11/20] i386/cpu: Enable xsave support for CET states Zhao Liu
2025-10-28  8:00   ` Xiaoyao Li
2025-10-29  4:58   ` Chao Gao
2025-10-30  4:29     ` Xiaoyao Li
2025-10-30 16:39       ` Zhao Liu
2025-10-24  6:56 ` [PATCH v3 12/20] i386/cpu: Add CET support in CR4 Zhao Liu
2025-10-28  2:04   ` Chenyi Qiang
2025-10-30 15:57     ` Zhao Liu
2025-10-24  6:56 ` [PATCH v3 13/20] i386/kvm: Add save/load support for CET MSRs Zhao Liu
2025-10-24  6:56 ` [PATCH v3 14/20] i386/kvm: Add save/load support for KVM_REG_GUEST_SSP Zhao Liu
2025-10-28  8:21   ` Xiaoyao Li
2025-10-24  6:56 ` [PATCH v3 15/20] i386/machine: Add vmstate for cet-ss and cet-ibt Zhao Liu
2025-10-28  8:29   ` Xiaoyao Li
2025-10-30 16:04     ` Zhao Liu
2025-10-24  6:56 ` [PATCH v3 16/20] i386/cpu: Mark cet-u & cet-s xstates as migratable Zhao Liu
2025-10-27 11:34   ` Zhao Liu
2025-10-29  6:13     ` Chao Gao
2025-10-29  6:10   ` Chao Gao
2025-10-30 16:09     ` Zhao Liu
2025-10-24  6:56 ` [PATCH v3 17/20] i386/cpu: Advertise CET related flags in feature words Zhao Liu
2025-10-28  8:33   ` Xiaoyao Li
2025-10-24  6:56 ` Zhao Liu [this message]
2025-10-28  8:34   ` [PATCH v3 18/20] i386/cpu: Enable cet-ss & cet-ibt for supported CPU models Xiaoyao Li
2025-10-24  6:56 ` [PATCH v3 19/20] i386/tdx: Fix missing spaces in tdx_xfam_deps[] Zhao Liu
2025-10-28  8:37   ` Xiaoyao Li
2025-10-24  6:56 ` [PATCH v3 20/20] i386/tdx: Add CET SHSTK/IBT into the supported CPUID by XFAM Zhao Liu
2025-10-28  8:55   ` Xiaoyao Li
2025-10-30 16:07     ` Zhao Liu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox
  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):
  git send-email \
    --in-reply-to=20251024065632.1448606-19-zhao1.liu@intel.com \
    --to=zhao1.liu@intel.com \
    --cc=babu.moger@amd.com \
    --cc=chao.gao@intel.com \
    --cc=chenyi.qiang@intel.com \
    --cc=dapeng1.mi@intel.com \
    --cc=farrah.chen@intel.com \
    --cc=john.allen@amd.com \
    --cc=kvm@vger.kernel.org \
    --cc=minipli@grsecurity.net \
    --cc=mtosatti@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=xiaoyao.li@intel.com \
    --cc=zide.chen@intel.com \
    /path/to/YOUR_REPLY
  https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
  Be sure your reply has a Subject: header at the top and a blank line
  before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).