From: Zhenzhong Duan <zhenzhong.duan@intel.com>
To: qemu-devel@nongnu.org
Cc: alex.williamson@redhat.com, clg@redhat.com,
eric.auger@redhat.com, mst@redhat.com, jasowang@redhat.com,
peterx@redhat.com, ddutile@redhat.com, jgg@nvidia.com,
nicolinc@nvidia.com, skolothumtho@nvidia.com,
joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com,
kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com,
Zhenzhong Duan <zhenzhong.duan@intel.com>
Subject: [PATCH v7 07/23] intel_iommu: Introduce a new structure VTDHostIOMMUDevice
Date: Fri, 24 Oct 2025 04:43:31 -0400 [thread overview]
Message-ID: <20251024084349.102322-8-zhenzhong.duan@intel.com> (raw)
In-Reply-To: <20251024084349.102322-1-zhenzhong.duan@intel.com>
Introduce a new structure VTDHostIOMMUDevice which replaces
HostIOMMUDevice to be stored in hash table.
It includes a reference to HostIOMMUDevice and IntelIOMMUState,
also includes BDF information which will be used in future
patches.
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Yi Liu <yi.l.liu@intel.com>
---
hw/i386/intel_iommu_internal.h | 7 +++++++
include/hw/i386/intel_iommu.h | 2 +-
hw/i386/intel_iommu.c | 15 +++++++++++++--
3 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
index ba0f1f5096..09edba81e2 100644
--- a/hw/i386/intel_iommu_internal.h
+++ b/hw/i386/intel_iommu_internal.h
@@ -28,6 +28,7 @@
#ifndef HW_I386_INTEL_IOMMU_INTERNAL_H
#define HW_I386_INTEL_IOMMU_INTERNAL_H
#include "hw/i386/intel_iommu.h"
+#include "system/host_iommu_device.h"
/*
* Intel IOMMU register specification
@@ -677,4 +678,10 @@ typedef struct VTDPASIDCacheInfo {
/* Bits to decide the offset for each level */
#define VTD_LEVEL_BITS 9
+typedef struct VTDHostIOMMUDevice {
+ IntelIOMMUState *iommu_state;
+ PCIBus *bus;
+ uint8_t devfn;
+ HostIOMMUDevice *hiod;
+} VTDHostIOMMUDevice;
#endif
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index a84d6965a4..3758ac239c 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -302,7 +302,7 @@ struct IntelIOMMUState {
/* list of registered notifiers */
QLIST_HEAD(, VTDAddressSpace) vtd_as_with_notifiers;
- GHashTable *vtd_host_iommu_dev; /* HostIOMMUDevice */
+ GHashTable *vtd_host_iommu_dev; /* VTDHostIOMMUDevice */
/* interrupt remapping */
bool intr_enabled; /* Whether guest enabled IR */
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index db5be065bf..4c83578c54 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -291,7 +291,10 @@ static gboolean vtd_hiod_equal(gconstpointer v1, gconstpointer v2)
static void vtd_hiod_destroy(gpointer v)
{
- object_unref(v);
+ VTDHostIOMMUDevice *vtd_hiod = v;
+
+ object_unref(vtd_hiod->hiod);
+ g_free(vtd_hiod);
}
static gboolean vtd_hash_remove_by_domain(gpointer key, gpointer value,
@@ -4610,6 +4613,7 @@ static bool vtd_dev_set_iommu_device(PCIBus *bus, void *opaque, int devfn,
HostIOMMUDevice *hiod, Error **errp)
{
IntelIOMMUState *s = opaque;
+ VTDHostIOMMUDevice *vtd_hiod;
struct vtd_as_key key = {
.bus = bus,
.devfn = devfn,
@@ -4632,7 +4636,14 @@ static bool vtd_dev_set_iommu_device(PCIBus *bus, void *opaque, int devfn,
return false;
}
+ vtd_hiod = g_malloc0(sizeof(VTDHostIOMMUDevice));
+ vtd_hiod->bus = bus;
+ vtd_hiod->devfn = (uint8_t)devfn;
+ vtd_hiod->iommu_state = s;
+ vtd_hiod->hiod = hiod;
+
if (!vtd_check_hiod(s, hiod, errp)) {
+ g_free(vtd_hiod);
vtd_iommu_unlock(s);
return false;
}
@@ -4642,7 +4653,7 @@ static bool vtd_dev_set_iommu_device(PCIBus *bus, void *opaque, int devfn,
new_key->devfn = devfn;
object_ref(hiod);
- g_hash_table_insert(s->vtd_host_iommu_dev, new_key, hiod);
+ g_hash_table_insert(s->vtd_host_iommu_dev, new_key, vtd_hiod);
vtd_iommu_unlock(s);
--
2.47.1
next prev parent reply other threads:[~2025-10-24 8:48 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-24 8:43 [PATCH v7 00/23] intel_iommu: Enable first stage translation for passthrough device Zhenzhong Duan
2025-10-24 8:43 ` [PATCH v7 01/23] intel_iommu: Rename vtd_ce_get_rid2pasid_entry to vtd_ce_get_pasid_entry Zhenzhong Duan
2025-10-24 8:43 ` [PATCH v7 02/23] intel_iommu: Delete RPS capability related supporting code Zhenzhong Duan
2025-10-31 7:50 ` Eric Auger
2025-10-31 9:49 ` Duan, Zhenzhong
2025-10-24 8:43 ` [PATCH v7 03/23] intel_iommu: Update terminology to match VTD spec Zhenzhong Duan
2025-10-24 8:43 ` [PATCH v7 04/23] hw/pci: Export pci_device_get_iommu_bus_devfn() and return bool Zhenzhong Duan
2025-10-24 8:43 ` [PATCH v7 05/23] hw/pci: Introduce pci_device_get_viommu_flags() Zhenzhong Duan
2025-10-24 17:18 ` Cédric Le Goater
2025-10-28 6:57 ` Duan, Zhenzhong
2025-10-28 15:19 ` Eric Auger
2025-10-24 8:43 ` [PATCH v7 06/23] intel_iommu: Implement get_viommu_flags() callback Zhenzhong Duan
2025-10-24 8:43 ` Zhenzhong Duan [this message]
2025-10-24 8:43 ` [PATCH v7 08/23] vfio/iommufd: Force creating nesting parent HWPT Zhenzhong Duan
2025-10-24 16:23 ` Cédric Le Goater
2025-10-28 6:00 ` Duan, Zhenzhong
2025-10-24 8:43 ` [PATCH v7 09/23] intel_iommu: Stick to system MR for IOMMUFD backed host device when x-flts=on Zhenzhong Duan
2025-10-31 8:09 ` Eric Auger
2025-10-31 9:52 ` Duan, Zhenzhong
2025-11-05 2:45 ` Nicolin Chen
2025-10-24 8:43 ` [PATCH v7 10/23] intel_iommu: Check for compatibility with IOMMUFD backed " Zhenzhong Duan
2025-10-24 17:29 ` Cédric Le Goater
2025-10-29 7:37 ` Duan, Zhenzhong
2025-10-24 8:43 ` [PATCH v7 11/23] intel_iommu: Fail passthrough device under PCI bridge if x-flts=on Zhenzhong Duan
2025-10-24 8:43 ` [PATCH v7 12/23] intel_iommu: Add some macros and inline functions Zhenzhong Duan
2025-10-24 16:39 ` Cédric Le Goater
2025-10-28 6:01 ` Duan, Zhenzhong
2025-11-02 11:15 ` Eric Auger
2025-11-03 3:44 ` Duan, Zhenzhong
2025-11-03 7:23 ` Eric Auger
2025-11-06 4:25 ` Duan, Zhenzhong
2025-10-24 8:43 ` [PATCH v7 13/23] intel_iommu: Bind/unbind guest page table to host Zhenzhong Duan
2025-10-24 17:01 ` Cédric Le Goater
2025-11-03 9:25 ` Eric Auger
2025-10-24 17:33 ` Cédric Le Goater
2025-10-29 9:56 ` Duan, Zhenzhong
2025-11-03 9:37 ` Eric Auger
2025-10-24 8:43 ` [PATCH v7 14/23] intel_iommu: Propagate PASID-based iotlb invalidation " Zhenzhong Duan
2025-11-03 10:04 ` Eric Auger
2025-10-24 8:43 ` [PATCH v7 15/23] intel_iommu: Replay all pasid bindings when either SRTP or TE bit is changed Zhenzhong Duan
2025-10-24 8:43 ` [PATCH v7 16/23] intel_iommu: Replay pasid bindings after context cache invalidation Zhenzhong Duan
2025-11-03 10:45 ` Eric Auger
2025-10-24 8:43 ` [PATCH v7 17/23] iommufd: Introduce a helper function to extract vendor capabilities Zhenzhong Duan
2025-10-24 16:44 ` Cédric Le Goater
2025-10-28 9:43 ` Duan, Zhenzhong
2025-10-24 17:34 ` Cédric Le Goater
2025-10-28 9:28 ` Duan, Zhenzhong
2025-11-03 12:57 ` Eric Auger
2025-10-24 8:43 ` [PATCH v7 18/23] vfio: Add a new element bypass_ro in VFIOContainer Zhenzhong Duan
2025-11-03 13:01 ` Eric Auger
2025-10-24 8:43 ` [PATCH v7 19/23] Workaround for ERRATA_772415_SPR17 Zhenzhong Duan
2025-10-24 17:36 ` Cédric Le Goater
2025-10-24 17:38 ` Cédric Le Goater
2025-11-03 13:14 ` Eric Auger
2025-10-24 8:43 ` [PATCH v7 20/23] vfio: Bypass readonly region for dirty tracking Zhenzhong Duan
2025-10-24 16:32 ` Cédric Le Goater
2025-10-28 9:47 ` Duan, Zhenzhong
2025-11-03 13:07 ` Eric Auger
2025-10-24 8:43 ` [PATCH v7 21/23] intel_iommu: Add migration support with x-flts=on Zhenzhong Duan
2025-11-03 13:16 ` Eric Auger
2025-10-24 8:43 ` [PATCH v7 22/23] intel_iommu: Enable host device when x-flts=on in scalable mode Zhenzhong Duan
2025-10-24 8:43 ` [PATCH v7 23/23] docs/devel: Add IOMMUFD nesting documentation Zhenzhong Duan
2025-11-03 13:23 ` Eric Auger
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20251024084349.102322-8-zhenzhong.duan@intel.com \
--to=zhenzhong.duan@intel.com \
--cc=alex.williamson@redhat.com \
--cc=chao.p.peng@intel.com \
--cc=clement.mathieu--drif@eviden.com \
--cc=clg@redhat.com \
--cc=ddutile@redhat.com \
--cc=eric.auger@redhat.com \
--cc=jasowang@redhat.com \
--cc=jgg@nvidia.com \
--cc=joao.m.martins@oracle.com \
--cc=kevin.tian@intel.com \
--cc=mst@redhat.com \
--cc=nicolinc@nvidia.com \
--cc=peterx@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=skolothumtho@nvidia.com \
--cc=yi.l.liu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).