[PATCH v2 5/7] hw/pci-host/sabre: Include 'host' in host bridge method names

["Philippe Mathieu-Daudé" <philmd@linaro.org>]

Rename various methods to help distinguish between
sabre_host* (for host bridge block) and sabre_pci*
(for the PCI function).

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/pci-host/sabre.c | 44 ++++++++++++++++++++++----------------------
 1 file changed, 22 insertions(+), 22 deletions(-)

diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c
index f63d832efc0..669191b6c7e 100644
--- a/hw/pci-host/sabre.c
+++ b/hw/pci-host/sabre.c
@@ -116,8 +116,8 @@ static const PCIIOMMUOps sabre_iommu_ops = {
     .get_address_space = sabre_pci_dma_iommu,
 };
 
-static void sabre_config_write(void *opaque, hwaddr addr,
-                               uint64_t val, unsigned size)
+static void sabre_host_config_write(void *opaque, hwaddr addr,
+                                    uint64_t val, unsigned size)
 {
     SabreState *s = opaque;
 
@@ -194,8 +194,8 @@ static void sabre_config_write(void *opaque, hwaddr addr,
     }
 }
 
-static uint64_t sabre_config_read(void *opaque,
-                                  hwaddr addr, unsigned size)
+static uint64_t sabre_host_config_read(void *opaque,
+                                       hwaddr addr, unsigned size)
 {
     SabreState *s = opaque;
     uint32_t val = 0;
@@ -240,9 +240,9 @@ static uint64_t sabre_config_read(void *opaque,
     return val;
 }
 
-static const MemoryRegionOps sabre_config_ops = {
-    .read = sabre_config_read,
-    .write = sabre_config_write,
+static const MemoryRegionOps sabre_host_config_ops = {
+    .read = sabre_host_config_read,
+    .write = sabre_host_config_write,
     .endianness = DEVICE_BIG_ENDIAN,
 };
 
@@ -329,7 +329,7 @@ static void pci_sabre_set_irq(void *opaque, int irq_num, int level)
     }
 }
 
-static void sabre_reset(DeviceState *d)
+static void sabre_host_reset(DeviceState *d)
 {
     SabreState *s = SABRE(d);
     PCIDevice *pci_dev;
@@ -367,7 +367,7 @@ static const MemoryRegionOps pci_config_ops = {
     .endianness = DEVICE_LITTLE_ENDIAN,
 };
 
-static void sabre_realize(DeviceState *dev, Error **errp)
+static void sabre_host_realize(DeviceState *dev, Error **errp)
 {
     SabreState *s = SABRE(dev);
     PCIHostState *phb = PCI_HOST_BRIDGE(dev);
@@ -402,7 +402,7 @@ static void sabre_realize(DeviceState *dev, Error **errp)
     pci_realize_and_unref(pci_dev, phb->bus, &error_fatal);
 }
 
-static void sabre_init(Object *obj)
+static void sabre_host_instance_init(Object *obj)
 {
     SabreState *s = SABRE(obj);
     SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
@@ -429,7 +429,7 @@ static void sabre_init(Object *obj)
                              0);
 
     /* sabre_config */
-    memory_region_init_io(&s->sabre_config, obj, &sabre_config_ops, s,
+    memory_region_init_io(&s->sabre_config, obj, &sabre_host_config_ops, s,
                           "sabre-config", 0x10000);
     /* at region 0 */
     sysbus_init_mmio(sbd, &s->sabre_config);
@@ -483,7 +483,7 @@ static const TypeInfo sabre_pci_info = {
     },
 };
 
-static char *sabre_ofw_unit_address(const SysBusDevice *dev)
+static char *sabre_host_ofw_unit_address(const SysBusDevice *dev)
 {
     SabreState *s = SABRE(dev);
 
@@ -492,34 +492,34 @@ static char *sabre_ofw_unit_address(const SysBusDevice *dev)
                (uint32_t)(s->special_base & 0xffffffff));
 }
 
-static const Property sabre_properties[] = {
+static const Property sabre_host_properties[] = {
     DEFINE_PROP_UINT64("special-base", SabreState, special_base, 0),
     DEFINE_PROP_UINT64("mem-base", SabreState, mem_base, 0),
 };
 
-static void sabre_class_init(ObjectClass *klass, const void *data)
+static void sabre_host_class_init(ObjectClass *klass, const void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
     SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
 
-    dc->realize = sabre_realize;
-    device_class_set_legacy_reset(dc, sabre_reset);
-    device_class_set_props(dc, sabre_properties);
+    dc->realize = sabre_host_realize;
+    device_class_set_legacy_reset(dc, sabre_host_reset);
+    device_class_set_props(dc, sabre_host_properties);
     dc->fw_name = "pci";
-    sbc->explicit_ofw_unit_address = sabre_ofw_unit_address;
+    sbc->explicit_ofw_unit_address = sabre_host_ofw_unit_address;
 }
 
-static const TypeInfo sabre_info = {
+static const TypeInfo sabre_host_info = {
     .name          = TYPE_SABRE,
     .parent        = TYPE_PCI_HOST_BRIDGE,
     .instance_size = sizeof(SabreState),
-    .instance_init = sabre_init,
-    .class_init    = sabre_class_init,
+    .instance_init = sabre_host_instance_init,
+    .class_init    = sabre_host_class_init,
 };
 
 static void sabre_register_types(void)
 {
-    type_register_static(&sabre_info);
+    type_register_static(&sabre_host_info);
     type_register_static(&sabre_pci_info);
 }
 
-- 
2.51.0