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From: "Alex Bennée" <alex.bennee@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Julian Ganz" <neither@nut.email>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	qemu-arm@nongnu.org (open list:ARM TCG CPUs)
Subject: [PULL 12/35] target/arm: call plugin trap callbacks
Date: Wed, 29 Oct 2025 15:50:21 +0000	[thread overview]
Message-ID: <20251029155045.257802-13-alex.bennee@linaro.org> (raw)
In-Reply-To: <20251029155045.257802-1-alex.bennee@linaro.org>

From: Julian Ganz <neither@nut.email>

We recently introduced API for registering callbacks for trap related
events as well as the corresponding hook functions. Due to differences
between architectures, the latter need to be called from target specific
code.

This change places hooks for ARM (and Aarch64) targets. We decided to
treat the (V)IRQ, (VI/VF)NMI, (V)FIQ and VSERR exceptions as interrupts
since they are, presumably, async in nature.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Julian Ganz <neither@nut.email>
Message-ID: <20251027110344.2289945-13-alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

diff --git a/target/arm/internals.h b/target/arm/internals.h
index f86f421a3db..6fbf7e1ca49 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -375,6 +375,7 @@ static inline int r14_bank_number(int mode)
 
 void arm_cpu_register(const ARMCPUInfo *info);
 
+void arm_do_plugin_vcpu_discon_cb(CPUState *cs, uint64_t from);
 void register_cp_regs_for_features(ARMCPU *cpu);
 void init_cpreg_list(ARMCPU *cpu);
 
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 2ef9c178147..ef6435c3efb 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -34,6 +34,7 @@
 #endif
 #include "cpregs.h"
 #include "target/arm/gtimer.h"
+#include "qemu/plugin.h"
 
 #define HELPER_H "tcg/helper.h"
 #include "exec/helper-proto.h.inc"
@@ -8783,6 +8784,24 @@ static void take_aarch32_exception(CPUARMState *env, int new_mode,
     }
 }
 
+void arm_do_plugin_vcpu_discon_cb(CPUState *cs, uint64_t from)
+{
+    switch (cs->exception_index) {
+    case EXCP_IRQ:
+    case EXCP_VIRQ:
+    case EXCP_NMI:
+    case EXCP_VINMI:
+    case EXCP_FIQ:
+    case EXCP_VFIQ:
+    case EXCP_VFNMI:
+    case EXCP_VSERR:
+        qemu_plugin_vcpu_interrupt_cb(cs, from);
+        break;
+    default:
+        qemu_plugin_vcpu_exception_cb(cs, from);
+    }
+}
+
 static void arm_cpu_do_interrupt_aarch32_hyp(CPUState *cs)
 {
     /*
@@ -9473,6 +9492,7 @@ void arm_cpu_do_interrupt(CPUState *cs)
     ARMCPU *cpu = ARM_CPU(cs);
     CPUARMState *env = &cpu->env;
     unsigned int new_el = env->exception.target_el;
+    uint64_t last_pc = cs->cc->get_pc(cs);
 
     assert(!arm_feature(env, ARM_FEATURE_M));
 
@@ -9489,6 +9509,7 @@ void arm_cpu_do_interrupt(CPUState *cs)
     if (tcg_enabled() && arm_is_psci_call(cpu, cs->exception_index)) {
         arm_handle_psci_call(cpu);
         qemu_log_mask(CPU_LOG_INT, "...handled as PSCI call\n");
+        qemu_plugin_vcpu_hostcall_cb(cs, last_pc);
         return;
     }
 
@@ -9500,6 +9521,7 @@ void arm_cpu_do_interrupt(CPUState *cs)
 #ifdef CONFIG_TCG
     if (cs->exception_index == EXCP_SEMIHOST) {
         tcg_handle_semihosting(cs);
+        qemu_plugin_vcpu_hostcall_cb(cs, last_pc);
         return;
     }
 #endif
@@ -9525,6 +9547,8 @@ void arm_cpu_do_interrupt(CPUState *cs)
     if (!kvm_enabled()) {
         cpu_set_interrupt(cs, CPU_INTERRUPT_EXITTB);
     }
+
+    arm_do_plugin_vcpu_discon_cb(cs, last_pc);
 }
 #endif /* !CONFIG_USER_ONLY */
 
diff --git a/target/arm/tcg/m_helper.c b/target/arm/tcg/m_helper.c
index d856e3bc8e2..3fb24c77900 100644
--- a/target/arm/tcg/m_helper.c
+++ b/target/arm/tcg/m_helper.c
@@ -23,6 +23,7 @@
 #if !defined(CONFIG_USER_ONLY)
 #include "hw/intc/armv7m_nvic.h"
 #endif
+#include "qemu/plugin.h"
 
 static void v7m_msr_xpsr(CPUARMState *env, uint32_t mask,
                          uint32_t reg, uint32_t val)
@@ -2194,6 +2195,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
     CPUARMState *env = &cpu->env;
     uint32_t lr;
     bool ignore_stackfaults;
+    uint64_t last_pc = env->regs[15];
 
     arm_log_exception(cs);
 
@@ -2361,6 +2363,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
         g_assert_not_reached();
 #endif
         env->regs[15] += env->thumb ? 2 : 4;
+        qemu_plugin_vcpu_hostcall_cb(cs, last_pc);
         return;
     case EXCP_BKPT:
         armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_DEBUG, false);
@@ -2427,6 +2430,8 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
 
     ignore_stackfaults = v7m_push_stack(cpu);
     v7m_exception_taken(cpu, lr, false, ignore_stackfaults);
+
+    arm_do_plugin_vcpu_discon_cb(cs, last_pc);
 }
 
 uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg)
-- 
2.47.3



  parent reply	other threads:[~2025-10-29 15:55 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-29 15:50 [PULL 00/35] maintainer updates (ci, plugins, semihosting) Alex Bennée
2025-10-29 15:50 ` [PULL 01/35] ci: clean-up remaining bits of armhf builds Alex Bennée
2025-10-29 15:50 ` [PULL 02/35] scripts/ci/setup: regenerate yaml Alex Bennée
2025-10-29 15:50 ` [PULL 03/35] scripts/ci: move build-environment.yaml up a level Alex Bennée
2025-10-29 15:50 ` [PULL 04/35] scripts/ci: allow both Ubuntu or Debian to run upgrade Alex Bennée
2025-10-29 15:50 ` [PULL 05/35] tests/lcitool: generate a yaml file for the ppc64le runner Alex Bennée
2025-10-29 15:50 ` [PULL 06/35] scripts/ci: modify gitlab runner deb setup Alex Bennée
2025-10-29 15:50 ` [PULL 07/35] plugins: add types for callbacks related to certain discontinuities Alex Bennée
2025-10-29 15:50 ` [PULL 08/35] plugins: add API for registering discontinuity callbacks Alex Bennée
2025-10-29 15:50 ` [PULL 09/35] plugins: add hooks for new discontinuity related callbacks Alex Bennée
2025-10-29 15:50 ` [PULL 10/35] contrib/plugins: add plugin showcasing new dicontinuity related API Alex Bennée
2025-10-29 15:50 ` [PULL 11/35] target/alpha: call plugin trap callbacks Alex Bennée
2025-10-29 15:50 ` Alex Bennée [this message]
2025-10-29 15:50 ` [PULL 13/35] target/avr: " Alex Bennée
2025-10-29 15:50 ` [PULL 14/35] target/hppa: " Alex Bennée
2025-10-29 15:50 ` [PULL 15/35] target/i386: " Alex Bennée
2025-10-29 15:50 ` [PULL 16/35] target/loongarch: " Alex Bennée
2025-10-29 15:50 ` [PULL 17/35] target/m68k: " Alex Bennée
2025-10-29 15:50 ` [PULL 18/35] target/microblaze: " Alex Bennée
2025-10-29 15:50 ` [PULL 19/35] target/mips: " Alex Bennée
2025-10-29 15:50 ` [PULL 20/35] target/openrisc: " Alex Bennée
2025-10-29 15:50 ` [PULL 21/35] target/ppc: " Alex Bennée
2025-10-29 15:50 ` [PULL 22/35] target/riscv: " Alex Bennée
2025-10-29 15:50 ` [PULL 23/35] target/rx: " Alex Bennée
2025-10-29 15:50 ` [PULL 24/35] target/s390x: " Alex Bennée
2025-10-29 15:50 ` [PULL 25/35] target/sh4: " Alex Bennée
2025-10-29 15:50 ` [PULL 26/35] target/sparc: " Alex Bennée
2025-10-29 15:50 ` [PULL 27/35] target/tricore: " Alex Bennée
2025-10-29 15:50 ` [PULL 28/35] target/xtensa: " Alex Bennée
2025-10-29 15:50 ` [PULL 29/35] tests: add plugin asserting correctness of discon event's to_pc Alex Bennée
2025-10-29 15:50 ` [PULL 30/35] tests: add test for double-traps on rv64 Alex Bennée
2025-10-29 15:50 ` [PULL 31/35] tests: add test with interrupted memory accesses " Alex Bennée
2025-10-29 15:50 ` [PULL 32/35] plugins/core: add missing QEMU_DISABLE_CFI annotations Alex Bennée
2025-10-29 15:50 ` [PULL 33/35] configs: drop SBSA_REF from minimal specification Alex Bennée
2025-10-29 15:50 ` [PULL 34/35] gdbstub: Fix %s formatting Alex Bennée
2025-10-29 15:50 ` [PULL 35/35] semihosting: Fix GDB File-I/O FLEN Alex Bennée
2025-10-31  9:25 ` [PULL 00/35] maintainer updates (ci, plugins, semihosting) Richard Henderson

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