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Iglesias" Subject: [PULL 18/35] target/microblaze: call plugin trap callbacks Date: Wed, 29 Oct 2025 15:50:27 +0000 Message-ID: <20251029155045.257802-19-alex.bennee@linaro.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251029155045.257802-1-alex.bennee@linaro.org> References: <20251029155045.257802-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Julian Ganz We recently introduced API for registering callbacks for trap related events as well as the corresponding hook functions. Due to differences between architectures, the latter need to be called from target specific code. This change places the hook for MicroBlaze targets. This architecture has one special "exception" for interrupts and no host calls. Signed-off-by: Julian Ganz Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20251027110344.2289945-19-alex.bennee@linaro.org> Signed-off-by: Alex Bennée diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index cf577a72268..a1857b72172 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -27,6 +27,7 @@ #include "qemu/host-utils.h" #include "exec/log.h" #include "exec/helper-proto.h" +#include "qemu/plugin.h" G_NORETURN @@ -35,6 +36,7 @@ static void mb_unaligned_access_internal(CPUState *cs, uint64_t addr, { CPUMBState *env = cpu_env(cs); uint32_t esr, iflags; + uint64_t last_pc = env->pc; /* Recover the pc and iflags from the corresponding insn_start. */ cpu_restore_state(cs, retaddr); @@ -54,6 +56,7 @@ static void mb_unaligned_access_internal(CPUState *cs, uint64_t addr, env->ear = addr; env->esr = esr; cs->exception_index = EXCP_HW_EXCP; + qemu_plugin_vcpu_exception_cb(cs, last_pc); cpu_loop_exit(cs); } @@ -152,6 +155,7 @@ void mb_cpu_do_interrupt(CPUState *cs) CPUMBState *env = &cpu->env; uint32_t t, msr = mb_cpu_read_msr(env); bool set_esr; + uint64_t last_pc = env->pc; /* IMM flag cannot propagate across a branch and into the dslot. */ assert((env->iflags & (D_FLAG | IMM_FLAG)) != (D_FLAG | IMM_FLAG)); @@ -256,6 +260,12 @@ void mb_cpu_do_interrupt(CPUState *cs) env->res_addr = RES_ADDR_NONE; env->iflags = 0; + if (cs->exception_index == EXCP_IRQ) { + qemu_plugin_vcpu_interrupt_cb(cs, last_pc); + } else { + qemu_plugin_vcpu_exception_cb(cs, last_pc); + } + if (!set_esr) { qemu_log_mask(CPU_LOG_INT, " to pc=%08x msr=%08x\n", env->pc, msr); -- 2.47.3