* [PULL 03/10] target/ppc/cpu_init: Simplify the setup of the TLBxCFG SPR registers
2025-10-30 8:49 [PULL 00/10] ppc-for-10.2-d4 queue Harsh Prateek Bora
@ 2025-10-30 8:49 ` Harsh Prateek Bora
2025-10-30 8:49 ` [PULL 04/10] target/ppc: Remove the unusable e200 CPUs Harsh Prateek Bora
` (7 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Harsh Prateek Bora @ 2025-10-30 8:49 UTC (permalink / raw)
To: qemu-devel; +Cc: Thomas Huth, Chinmay Rath
From: Thomas Huth <thuth@redhat.com>
The next commit is going to remove init_proc_e200(), which is one of
the two calling sites of register_BookE206_sprs(). This causes recent
versions of GCC to inline the register_BookE206_sprs() function into
the other only remaining calling site, init_proc_e500(), which in
turn causes some false-positives compiler warnings:
In file included from ../../devel/qemu/target/ppc/cpu_init.c:46:
In function ‘register_BookE206_sprs’,
inlined from ‘init_proc_e500’ at ../../devel/qemu/target/ppc/cpu_init.c:2910:5:
../../devel/qemu/target/ppc/cpu_init.c:897:29: error:
array subscript 3 is outside array bounds of ‘uint32_t[2]’ {aka ‘unsigned int[2]’}
[-Werror=array-bounds=]
897 | tlbncfg[3]);
| ~~~~~~~^~~
../../devel/qemu/target/ppc/spr_common.h:61:39: note: in definition of macro ‘spr_register_kvm_hv’
61 | KVM_ARG(one_reg_id) initial_value)
| ^~~~~~~~~~~~~
../../devel/qemu/target/ppc/spr_common.h:77:5: note: in expansion of macro ‘spr_register_kvm’
77 | spr_register_kvm(env, num, name, uea_read, uea_write, \
| ^~~~~~~~~~~~~~~~
../../devel/qemu/target/ppc/cpu_init.c:894:9: note: in expansion of macro ‘spr_register’
894 | spr_register(env, SPR_BOOKE_TLB3CFG, "TLB3CFG",
| ^~~~~~~~~~~~
../../devel/qemu/target/ppc/cpu_init.c: In function ‘init_proc_e500’:
../../devel/qemu/target/ppc/cpu_init.c:2809:14: note: at offset 12 into object ‘tlbncfg’ of size 8
2809 | uint32_t tlbncfg[2];
| ^~~~~~~
cc1: all warnings being treated as errors
init_proc_e500() only defines "uint32_t tlbncfg[2];", but it is OK since
it also sets "env->nb_ways = 2", so the code that GCC warns about in
register_BookE206_sprs() is never reached. Unfortunately, GCC is not smart
enough to see this, so it emits these warnings.
To fix it, let's simplify the code in register_BookE206_sprs() a little
bit to set up the SPRs in a loop, so we don't reference the tlbncfg[3]
entry directly anymore.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Chinmay Rath <rathc@linux.ibm.com>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/r/20251024065726.738005-2-thuth@redhat.com
Message-ID: <20251024065726.738005-2-thuth@redhat.com>
---
target/ppc/cpu_init.c | 38 ++++++++++++--------------------------
1 file changed, 12 insertions(+), 26 deletions(-)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 3aa3aefc13..12c645699e 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -850,6 +850,13 @@ static void register_BookE206_sprs(CPUPPCState *env, uint32_t mas_mask,
SPR_BOOKE_MAS0, SPR_BOOKE_MAS1, SPR_BOOKE_MAS2, SPR_BOOKE_MAS3,
SPR_BOOKE_MAS4, SPR_BOOKE_MAS5, SPR_BOOKE_MAS6, SPR_BOOKE_MAS7,
};
+ const char *tlbcfg_names[4] = {
+ "TLB0CFG", "TLB1CFG", "TLB2CFG", "TLB3CFG",
+ };
+ const int tlbcfg_sprn[4] = {
+ SPR_BOOKE_TLB0CFG, SPR_BOOKE_TLB1CFG,
+ SPR_BOOKE_TLB2CFG, SPR_BOOKE_TLB3CFG,
+ };
int i;
/* TLB assist registers */
@@ -889,34 +896,13 @@ static void register_BookE206_sprs(CPUPPCState *env, uint32_t mas_mask,
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, SPR_NOACCESS,
mmucfg);
- switch (env->nb_ways) {
- case 4:
- spr_register(env, SPR_BOOKE_TLB3CFG, "TLB3CFG",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, SPR_NOACCESS,
- tlbncfg[3]);
- /* Fallthru */
- case 3:
- spr_register(env, SPR_BOOKE_TLB2CFG, "TLB2CFG",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, SPR_NOACCESS,
- tlbncfg[2]);
- /* Fallthru */
- case 2:
- spr_register(env, SPR_BOOKE_TLB1CFG, "TLB1CFG",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, SPR_NOACCESS,
- tlbncfg[1]);
- /* Fallthru */
- case 1:
- spr_register(env, SPR_BOOKE_TLB0CFG, "TLB0CFG",
+
+ assert(env->nb_ways <= ARRAY_SIZE(tlbcfg_names));
+ for (i = 0; i < env->nb_ways; i++) {
+ spr_register(env, tlbcfg_sprn[i], tlbcfg_names[i],
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, SPR_NOACCESS,
- tlbncfg[0]);
- /* Fallthru */
- case 0:
- default:
- break;
+ tlbncfg[i]);
}
#endif
}
--
2.43.5
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PULL 04/10] target/ppc: Remove the unusable e200 CPUs
2025-10-30 8:49 [PULL 00/10] ppc-for-10.2-d4 queue Harsh Prateek Bora
2025-10-30 8:49 ` [PULL 03/10] target/ppc/cpu_init: Simplify the setup of the TLBxCFG SPR registers Harsh Prateek Bora
@ 2025-10-30 8:49 ` Harsh Prateek Bora
2025-10-30 8:49 ` [PULL 05/10] ppc/spapr: Cleanup MSI IRQ number handling Harsh Prateek Bora
` (6 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Harsh Prateek Bora @ 2025-10-30 8:49 UTC (permalink / raw)
To: qemu-devel; +Cc: Thomas Huth, Philippe Mathieu-Daudé
From: Thomas Huth <thuth@redhat.com>
There is currently no machine in QEMU (except the "none" machine)
that can be run with with one of the e200 ppc CPUs - all machines
either complain about an invalid CPU type or crash QEMU immediately.
Looking at the history of this CPU type, it seems like it has never
been used in QEMU and only implemented as a placeholder (see e.g. the
comment about unimplemented instructions in the POWERPC_FAMILY(e200)
section of cpu_init.c). Being completely unused and unusable since
such a long time, let's just remove it now (without deprecation phase,
since there were no users of this dead code anyway).
Note: The init_excp_e200() is used by the e500 CPUs, too, so we
rename this function to init_excp_e500() instead of removing it.
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/r/20251024065726.738005-3-thuth@redhat.com
Message-ID: <20251024065726.738005-3-thuth@redhat.com>
---
target/ppc/cpu-models.h | 4 --
target/ppc/cpu-models.c | 5 --
target/ppc/cpu_init.c | 147 +---------------------------------------
3 files changed, 2 insertions(+), 154 deletions(-)
diff --git a/target/ppc/cpu-models.h b/target/ppc/cpu-models.h
index c6cd27f390..a439eb37ee 100644
--- a/target/ppc/cpu-models.h
+++ b/target/ppc/cpu-models.h
@@ -120,10 +120,6 @@ enum {
#define CPU_POWERPC_MPC5200_v12 CPU_POWERPC_G2LEgp1
#define CPU_POWERPC_MPC5200B_v20 CPU_POWERPC_G2LEgp1
#define CPU_POWERPC_MPC5200B_v21 CPU_POWERPC_G2LEgp1
- /* e200 family */
- /* e200 cores */
- CPU_POWERPC_e200z5 = 0x81000000,
- CPU_POWERPC_e200z6 = 0x81120000,
/* e300 family */
/* e300 cores */
CPU_POWERPC_e300c1 = 0x00830010,
diff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c
index 89ae763c7f..26b6debcfc 100644
--- a/target/ppc/cpu-models.c
+++ b/target/ppc/cpu-models.c
@@ -244,11 +244,6 @@
CPU_POWERPC_MPC5200B_v20, POWERPC_SVR_5200B_v20, G2LE)
POWERPC_DEF_SVR("mpc5200b_v21", "MPC5200B v2.1",
CPU_POWERPC_MPC5200B_v21, POWERPC_SVR_5200B_v21, G2LE)
- /* e200 family */
- POWERPC_DEF("e200z5", CPU_POWERPC_e200z5, e200,
- "PowerPC e200z5 core")
- POWERPC_DEF("e200z6", CPU_POWERPC_e200z6, e200,
- "PowerPC e200z6 core")
/* e300 family */
POWERPC_DEF("e300c1", CPU_POWERPC_e300c1, e300,
"PowerPC e300c1 core")
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 12c645699e..86ead740ee 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -1811,7 +1811,7 @@ static void init_excp_G2(CPUPPCState *env)
#endif
}
-static void init_excp_e200(CPUPPCState *env, target_ulong ivpr_mask)
+static void init_excp_e500(CPUPPCState *env, target_ulong ivpr_mask)
{
#if !defined(CONFIG_USER_ONLY)
env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000FFC;
@@ -2782,149 +2782,6 @@ POWERPC_FAMILY(G2LE)(ObjectClass *oc, const void *data)
POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK;
}
-static void init_proc_e200(CPUPPCState *env)
-{
- register_BookE_sprs(env, 0x000000070000FFFFULL);
-
- spr_register(env, SPR_BOOKE_SPEFSCR, "SPEFSCR",
- &spr_read_spefscr, &spr_write_spefscr,
- &spr_read_spefscr, &spr_write_spefscr,
- 0x00000000);
- /* Memory management */
- register_BookE206_sprs(env, 0x0000005D, NULL, 0);
- register_usprgh_sprs(env);
-
- spr_register(env, SPR_HID0, "HID0",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
-
- spr_register(env, SPR_HID1, "HID1",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
-
- spr_register(env, SPR_Exxx_ALTCTXCR, "ALTCTXCR",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
-
- spr_register(env, SPR_Exxx_BUCSR, "BUCSR",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
-
- spr_register(env, SPR_Exxx_CTXCR, "CTXCR",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
-
- spr_register(env, SPR_Exxx_DBCNT, "DBCNT",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
-
- spr_register(env, SPR_Exxx_DBCR3, "DBCR3",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
-
- spr_register(env, SPR_Exxx_L1CFG0, "L1CFG0",
- &spr_read_generic, SPR_NOACCESS,
- &spr_read_generic, SPR_NOACCESS,
- 0x00000000);
-
- spr_register(env, SPR_Exxx_L1CSR0, "L1CSR0",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
-
- spr_register(env, SPR_Exxx_L1FINV0, "L1FINV0",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
-
- spr_register(env, SPR_BOOKE_TLB0CFG, "TLB0CFG",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
-
- spr_register(env, SPR_BOOKE_TLB1CFG, "TLB1CFG",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
-
- spr_register(env, SPR_BOOKE_IAC3, "IAC3",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
-
- spr_register(env, SPR_BOOKE_IAC4, "IAC4",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000);
-
- spr_register(env, SPR_MMUCSR0, "MMUCSR0",
- SPR_NOACCESS, SPR_NOACCESS,
- &spr_read_generic, &spr_write_generic,
- 0x00000000); /* TOFIX */
-
- init_tlbs_emb(env);
- init_excp_e200(env, 0xFFFF0000UL);
- env->dcache_line_size = 32;
- env->icache_line_size = 32;
- /* XXX: TODO: allocate internal IRQ controller */
-}
-
-POWERPC_FAMILY(e200)(ObjectClass *oc, const void *data)
-{
- DeviceClass *dc = DEVICE_CLASS(oc);
- PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
-
- dc->desc = "e200 core";
- pcc->init_proc = init_proc_e200;
- pcc->check_pow = check_pow_hid0;
- pcc->check_attn = check_attn_none;
- /*
- * XXX: unimplemented instructions:
- * dcblc
- * dcbtlst
- * dcbtstls
- * icblc
- * icbtls
- * tlbivax
- * all SPE multiply-accumulate instructions
- */
- pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL |
- PPC_SPE | PPC_SPE_SINGLE |
- PPC_WRTEE | PPC_RFDI |
- PPC_CACHE | PPC_CACHE_LOCK | PPC_CACHE_ICBI |
- PPC_CACHE_DCBZ | PPC_CACHE_DCBA |
- PPC_MEM_TLBSYNC | PPC_TLBIVAX |
- PPC_BOOKE;
- pcc->msr_mask = (1ull << MSR_UCLE) |
- (1ull << MSR_SPE) |
- (1ull << MSR_POW) |
- (1ull << MSR_CE) |
- (1ull << MSR_EE) |
- (1ull << MSR_PR) |
- (1ull << MSR_FP) |
- (1ull << MSR_ME) |
- (1ull << MSR_FE0) |
- (1ull << MSR_DWE) |
- (1ull << MSR_DE) |
- (1ull << MSR_FE1) |
- (1ull << MSR_IR) |
- (1ull << MSR_DR);
- pcc->mmu_model = POWERPC_MMU_BOOKE206;
- pcc->excp_model = POWERPC_EXCP_BOOKE;
- pcc->bus_model = PPC_FLAGS_INPUT_BookE;
- pcc->bfd_mach = bfd_mach_ppc_860;
- pcc->flags = POWERPC_FLAG_SPE | POWERPC_FLAG_CE |
- POWERPC_FLAG_UBLE | POWERPC_FLAG_DE |
- POWERPC_FLAG_BUS_CLK;
-}
-
enum fsl_e500_version {
fsl_e500v1,
fsl_e500v2,
@@ -3159,7 +3016,7 @@ static void init_proc_e500(CPUPPCState *env, int version)
}
#endif
- init_excp_e200(env, ivpr_mask);
+ init_excp_e500(env, ivpr_mask);
/* Allocate hardware IRQ controller */
ppce500_irq_init(env_archcpu(env));
}
--
2.43.5
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PULL 05/10] ppc/spapr: Cleanup MSI IRQ number handling
2025-10-30 8:49 [PULL 00/10] ppc-for-10.2-d4 queue Harsh Prateek Bora
2025-10-30 8:49 ` [PULL 03/10] target/ppc/cpu_init: Simplify the setup of the TLBxCFG SPR registers Harsh Prateek Bora
2025-10-30 8:49 ` [PULL 04/10] target/ppc: Remove the unusable e200 CPUs Harsh Prateek Bora
@ 2025-10-30 8:49 ` Harsh Prateek Bora
2025-10-30 8:49 ` [PULL 06/10] hw/ppc: Fix missing return on allocation failure Harsh Prateek Bora
` (5 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Harsh Prateek Bora @ 2025-10-30 8:49 UTC (permalink / raw)
To: qemu-devel; +Cc: Yoges Vyas, Chinmay Rath
From: Yoges Vyas <yvyas1991@gmail.com>
Now that spapr_irq_nr_msis() returns a constant value,
lets replace it with a macro.
Ref: https://lore.kernel.org/qemu-devel/bf149815-9782-4964-953d-73658b1043c9@linux.ibm.com/
Suggested-by: Chinmay Rath <rathc@linux.ibm.com>
Signed-off-by: Yogesh Vyas <yvyas1991@gmail.com>
Reviewed-by: Chinmay Rath <rathc@linux.ibm.com>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/r/20251026074852.53691-1-yvyas1991@gmail.com
Message-ID: <20251026074852.53691-1-yvyas1991@gmail.com>
---
include/hw/ppc/spapr_irq.h | 2 +-
hw/ppc/spapr_irq.c | 7 +------
hw/ppc/spapr_pci.c | 2 +-
3 files changed, 3 insertions(+), 8 deletions(-)
diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h
index 5ddd1107c3..265d43e06b 100644
--- a/include/hw/ppc/spapr_irq.h
+++ b/include/hw/ppc/spapr_irq.h
@@ -40,6 +40,7 @@
#define SPAPR_IRQ_MSI (SPAPR_XIRQ_BASE + 0x0300)
#define SPAPR_NR_XIRQS 0x1000
+#define SPAPR_IRQ_NR_MSIS (SPAPR_XIRQ_BASE + SPAPR_NR_XIRQS - SPAPR_IRQ_MSI)
struct SpaprMachineState;
@@ -89,7 +90,6 @@ void spapr_irq_print_info(struct SpaprMachineState *spapr, GString *buf);
void spapr_irq_dt(struct SpaprMachineState *spapr, uint32_t nr_servers,
void *fdt, uint32_t phandle);
-uint32_t spapr_irq_nr_msis(struct SpaprMachineState *spapr);
int spapr_irq_msi_alloc(struct SpaprMachineState *spapr, uint32_t num, bool align,
Error **errp);
void spapr_irq_msi_free(struct SpaprMachineState *spapr, int irq, uint32_t num);
diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
index 2ce323457b..fc45a5d5d6 100644
--- a/hw/ppc/spapr_irq.c
+++ b/hw/ppc/spapr_irq.c
@@ -33,7 +33,7 @@ static const TypeInfo spapr_intc_info = {
static void spapr_irq_msi_init(SpaprMachineState *spapr)
{
- spapr->irq_map_nr = spapr_irq_nr_msis(spapr);
+ spapr->irq_map_nr = SPAPR_IRQ_NR_MSIS;
spapr->irq_map = bitmap_new(spapr->irq_map_nr);
}
@@ -277,11 +277,6 @@ void spapr_irq_dt(SpaprMachineState *spapr, uint32_t nr_servers,
sicc->dt(spapr->active_intc, nr_servers, fdt, phandle);
}
-uint32_t spapr_irq_nr_msis(SpaprMachineState *spapr)
-{
- return SPAPR_NR_XIRQS + SPAPR_XIRQ_BASE - SPAPR_IRQ_MSI;
-}
-
void spapr_irq_init(SpaprMachineState *spapr, Error **errp)
{
if (kvm_enabled() && kvm_kernel_irqchip_split()) {
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index bdec8f0728..d596a9e38e 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -2279,7 +2279,7 @@ int spapr_dt_phb(SpaprMachineState *spapr, SpaprPhbState *phb,
_FDT(fdt_setprop(fdt, bus_off, "reg", &bus_reg, sizeof(bus_reg)));
_FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pci-config-space-type", 0x1));
_FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pe-total-#msi",
- spapr_irq_nr_msis(spapr)));
+ SPAPR_IRQ_NR_MSIS));
/* Dynamic DMA window */
if (phb->ddw_enabled) {
--
2.43.5
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PULL 06/10] hw/ppc: Fix missing return on allocation failure
2025-10-30 8:49 [PULL 00/10] ppc-for-10.2-d4 queue Harsh Prateek Bora
` (2 preceding siblings ...)
2025-10-30 8:49 ` [PULL 05/10] ppc/spapr: Cleanup MSI IRQ number handling Harsh Prateek Bora
@ 2025-10-30 8:49 ` Harsh Prateek Bora
2025-10-30 8:49 ` [PULL 07/10] hw/ppc: Fix memory leak in get_cpu_state_data() Harsh Prateek Bora
` (4 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Harsh Prateek Bora @ 2025-10-30 8:49 UTC (permalink / raw)
To: qemu-devel; +Cc: Shivang Upadhyay, Aditya Gupta, Peter Maydell
From: Shivang Upadhyay <shivangu@linux.ibm.com>
Fixes coverity (CID 1642026)
Cc: Aditya Gupta <adityag@linux.ibm.com>
Cc: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/CAFEAcA-SPmsnU1wzsWxBcFC=ZM_DDhPEg1N4iX9Q4bL1xOnwBg@mail.gmail.com/
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Shivang Upadhyay <shivangu@linux.ibm.com>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/r/20251028080551.92722-2-shivangu@linux.ibm.com
Message-ID: <20251028080551.92722-2-shivangu@linux.ibm.com>
---
hw/ppc/spapr_fadump.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/ppc/spapr_fadump.c b/hw/ppc/spapr_fadump.c
index fa3aeac94c..883a60cdcf 100644
--- a/hw/ppc/spapr_fadump.c
+++ b/hw/ppc/spapr_fadump.c
@@ -234,6 +234,7 @@ static bool do_preserve_region(FadumpSection *region)
qemu_log_mask(LOG_GUEST_ERROR,
"FADump: Failed allocating memory (size: %zu) for copying"
" reserved memory regions\n", FADUMP_CHUNK_SIZE);
+ return false;
}
num_chunks = ceil((src_len * 1.0f) / FADUMP_CHUNK_SIZE);
--
2.43.5
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PULL 07/10] hw/ppc: Fix memory leak in get_cpu_state_data()
2025-10-30 8:49 [PULL 00/10] ppc-for-10.2-d4 queue Harsh Prateek Bora
` (3 preceding siblings ...)
2025-10-30 8:49 ` [PULL 06/10] hw/ppc: Fix missing return on allocation failure Harsh Prateek Bora
@ 2025-10-30 8:49 ` Harsh Prateek Bora
2025-10-30 8:49 ` [PULL 08/10] hw/ppc/pegasos2: Add /chosen/stdin node with VOF Harsh Prateek Bora
` (3 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Harsh Prateek Bora @ 2025-10-30 8:49 UTC (permalink / raw)
To: qemu-devel
Cc: Shivang Upadhyay, Aditya Gupta, Peter Maydell,
Philippe Mathieu-Daudé
From: Shivang Upadhyay <shivangu@linux.ibm.com>
Fixes coverity (CID 1642024)
Cc: Aditya Gupta <adityag@linux.ibm.com>
Cc: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/CAFEAcA_Bm52bkPi9MH_uugXRR5fj48RtpbOnPNFQtbX=7Mz_yw@mail.gmail.com/
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Shivang Upadhyay <shivangu@linux.ibm.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/r/20251028080551.92722-3-shivangu@linux.ibm.com
Message-ID: <20251028080551.92722-3-shivangu@linux.ibm.com>
---
hw/ppc/spapr_fadump.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/spapr_fadump.c b/hw/ppc/spapr_fadump.c
index 883a60cdcf..13cab0cfe1 100644
--- a/hw/ppc/spapr_fadump.c
+++ b/hw/ppc/spapr_fadump.c
@@ -453,7 +453,7 @@ static FadumpRegEntry *populate_cpu_reg_entries(CPUState *cpu,
static void *get_cpu_state_data(uint64_t *cpu_state_len)
{
FadumpRegSaveAreaHeader reg_save_hdr;
- FadumpRegEntry *reg_entries;
+ g_autofree FadumpRegEntry *reg_entries = NULL;
FadumpRegEntry *curr_reg_entry;
CPUState *cpu;
--
2.43.5
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PULL 08/10] hw/ppc/pegasos2: Add /chosen/stdin node with VOF
2025-10-30 8:49 [PULL 00/10] ppc-for-10.2-d4 queue Harsh Prateek Bora
` (4 preceding siblings ...)
2025-10-30 8:49 ` [PULL 07/10] hw/ppc: Fix memory leak in get_cpu_state_data() Harsh Prateek Bora
@ 2025-10-30 8:49 ` Harsh Prateek Bora
2025-10-30 8:49 ` [PULL 09/10] hw/ppc/pegasos2: Rename to pegasos Harsh Prateek Bora
` (2 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Harsh Prateek Bora @ 2025-10-30 8:49 UTC (permalink / raw)
To: qemu-devel; +Cc: BALATON Zoltan
From: BALATON Zoltan <balaton@eik.bme.hu>
Some very old Linux kernels fail to start if /chosen/stdin is not
found so add it to the device tree when using VOF.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/r/642ef77674d08ba466e7a2beb4858ab1e67776ae.1761346145.git.balaton@eik.bme.hu
Message-ID: <642ef77674d08ba466e7a2beb4858ab1e67776ae.1761346145.git.balaton@eik.bme.hu>
---
hw/ppc/pegasos2.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
index 3c02c53c3a..3a498edd16 100644
--- a/hw/ppc/pegasos2.c
+++ b/hw/ppc/pegasos2.c
@@ -561,6 +561,7 @@ static void pegasos_machine_reset(MachineState *machine, ResetType type)
qemu_fdt_setprop(fdt, "/chosen", "qemu,boot-kernel", d, sizeof(d));
vof_build_dt(fdt, pm->vof);
+ vof_client_open_store(fdt, pm->vof, "/chosen", "stdin", "/failsafe");
vof_client_open_store(fdt, pm->vof, "/chosen", "stdout", "/failsafe");
/* Set machine->fdt for 'dumpdtb' QMP/HMP command */
--
2.43.5
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PULL 09/10] hw/ppc/pegasos2: Rename to pegasos
2025-10-30 8:49 [PULL 00/10] ppc-for-10.2-d4 queue Harsh Prateek Bora
` (5 preceding siblings ...)
2025-10-30 8:49 ` [PULL 08/10] hw/ppc/pegasos2: Add /chosen/stdin node with VOF Harsh Prateek Bora
@ 2025-10-30 8:49 ` Harsh Prateek Bora
2025-10-30 8:49 ` [PULL 10/10] hw/ppc/pegasos: Update documentation for pegasos1 Harsh Prateek Bora
2025-11-01 9:50 ` [PULL 00/10] ppc-for-10.2-d4 queue Richard Henderson
8 siblings, 0 replies; 10+ messages in thread
From: Harsh Prateek Bora @ 2025-10-30 8:49 UTC (permalink / raw)
To: qemu-devel; +Cc: BALATON Zoltan, Philippe Mathieu-Daudé
From: BALATON Zoltan <balaton@eik.bme.hu>
Now that we also emulate pegasos1 it is not only about pegasos2 so
rename to a more generic name encompassing both.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/r/275cd2d5074b76b4a504a01f658e85ed7994ea3e.1761346145.git.balaton@eik.bme.hu
Message-ID: <275cd2d5074b76b4a504a01f658e85ed7994ea3e.1761346145.git.balaton@eik.bme.hu>
---
MAINTAINERS | 4 ++--
configs/devices/ppc-softmmu/default.mak | 7 +++----
hw/ppc/{pegasos2.c => pegasos.c} | 0
hw/ppc/Kconfig | 2 +-
hw/ppc/meson.build | 4 ++--
5 files changed, 8 insertions(+), 9 deletions(-)
rename hw/ppc/{pegasos2.c => pegasos.c} (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0a620ba87c..8063eefa2a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1648,11 +1648,11 @@ F: roms/u-boot-sam460ex
F: docs/system/ppc/amigang.rst
F: tests/functional/ppc/test_sam460ex.py
-pegasos2
+pegasos
M: BALATON Zoltan <balaton@eik.bme.hu>
L: qemu-ppc@nongnu.org
S: Maintained
-F: hw/ppc/pegasos2.c
+F: hw/ppc/pegasos.c
F: hw/pci-host/mv64361.c
F: hw/pci-host/mv643xx.h
F: include/hw/pci-host/mv64361.h
diff --git a/configs/devices/ppc-softmmu/default.mak b/configs/devices/ppc-softmmu/default.mak
index 460d15e676..180ae31e2d 100644
--- a/configs/devices/ppc-softmmu/default.mak
+++ b/configs/devices/ppc-softmmu/default.mak
@@ -13,15 +13,14 @@
# CONFIG_PPC440=n
# CONFIG_VIRTEX=n
-# For Sam460ex
+# AmigaNG
+# CONFIG_AMIGAONE=n
+# CONFIG_PEGASOS=n
# CONFIG_SAM460EX=n
# For Macs
# CONFIG_MAC_OLDWORLD=n
# CONFIG_MAC_NEWWORLD=n
-# CONFIG_AMIGAONE=n
-# CONFIG_PEGASOS2=n
-
# For PReP
# CONFIG_PREP=n
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos.c
similarity index 100%
rename from hw/ppc/pegasos2.c
rename to hw/ppc/pegasos.c
diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
index 7091d72fd8..347dcce690 100644
--- a/hw/ppc/Kconfig
+++ b/hw/ppc/Kconfig
@@ -92,7 +92,7 @@ config AMIGAONE
select VT82C686
select SMBUS_EEPROM
-config PEGASOS2
+config PEGASOS
bool
default y
depends on PPC
diff --git a/hw/ppc/meson.build b/hw/ppc/meson.build
index 6b7c1f4f49..f7dac87a2a 100644
--- a/hw/ppc/meson.build
+++ b/hw/ppc/meson.build
@@ -87,8 +87,8 @@ ppc_ss.add(when: 'CONFIG_E500', if_true: files(
ppc_ss.add(when: 'CONFIG_VIRTEX', if_true: files('virtex_ml507.c'))
# AmigaOne
ppc_ss.add(when: 'CONFIG_AMIGAONE', if_true: files('amigaone.c'))
-# Pegasos2
-ppc_ss.add(when: 'CONFIG_PEGASOS2', if_true: files('pegasos2.c'))
+# Pegasos
+ppc_ss.add(when: 'CONFIG_PEGASOS', if_true: files('pegasos.c'))
ppc_ss.add(when: 'CONFIG_VOF', if_true: files('vof.c'))
ppc_ss.add(when: ['CONFIG_VOF', 'CONFIG_PSERIES'], if_true: files('spapr_vof.c'))
--
2.43.5
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PULL 10/10] hw/ppc/pegasos: Update documentation for pegasos1
2025-10-30 8:49 [PULL 00/10] ppc-for-10.2-d4 queue Harsh Prateek Bora
` (6 preceding siblings ...)
2025-10-30 8:49 ` [PULL 09/10] hw/ppc/pegasos2: Rename to pegasos Harsh Prateek Bora
@ 2025-10-30 8:49 ` Harsh Prateek Bora
2025-11-01 9:50 ` [PULL 00/10] ppc-for-10.2-d4 queue Richard Henderson
8 siblings, 0 replies; 10+ messages in thread
From: Harsh Prateek Bora @ 2025-10-30 8:49 UTC (permalink / raw)
To: qemu-devel; +Cc: BALATON Zoltan, Philippe Mathieu-Daudé
From: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/r/f86b90f6839a0cf9426c0d89e95e6ca33704728c.1761346145.git.balaton@eik.bme.hu
Message-ID: <f86b90f6839a0cf9426c0d89e95e6ca33704728c.1761346145.git.balaton@eik.bme.hu>
---
docs/system/ppc/amigang.rst | 29 +++++++++++++++++------------
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/docs/system/ppc/amigang.rst b/docs/system/ppc/amigang.rst
index 21bb14ed09..e290412369 100644
--- a/docs/system/ppc/amigang.rst
+++ b/docs/system/ppc/amigang.rst
@@ -1,6 +1,6 @@
-=========================================================
-AmigaNG boards (``amigaone``, ``pegasos2``, ``sam460ex``)
-=========================================================
+=======================================================================
+AmigaNG boards (``amigaone``, ``pegasos1``, ``pegasos2``, ``sam460ex``)
+=======================================================================
These PowerPC machines emulate boards that are primarily used for
running Amiga like OSes (AmigaOS 4, MorphOS and AROS) but these can
@@ -64,18 +64,23 @@ eventually it boots and the installer becomes visible. The ``ati-vga`` RV100
emulation is not complete yet so only frame buffer works, DRM and 3D is not
available.
-Genesi/bPlan Pegasos II (``pegasos2``)
-======================================
+Genesi/bPlan Pegasos (``pegasos1``, ``pegasos2``)
+=================================================
-The ``pegasos2`` machine emulates the Pegasos II sold by Genesi and
-designed by bPlan. Its schematics are available at
-https://www.powerdeveloper.org/platforms/pegasos/schematics.
+The ``pegasos1`` machine emulates the original Pegasos (later marked I) sold by
+Genesi and designed by bPlan. It uses the same Articia S north bridge as the
+``amigaone`` machine, otherwise it is mostly the same as the later Pegasos II.
+
+The ``pegasos2`` machine emulates the Pegasos II which is a redesigned version
+of Pegasos I to fix problems with its north bridge. Its schematics are available
+at https://www.powerdeveloper.org/platforms/pegasos/schematics.
Emulated devices
----------------
* PowerPC 7457 CPU (can also use ``-cpu g3`` or ``750cxe``)
- * Marvell MV64361 Discovery II north bridge
+ * Articia S north bridge (for ``pegasos1``)
+ * Marvell MV64361 Discovery II north bridge (for ``pegasos2``)
* VIA VT8231 south bridge
* PCI VGA compatible card (guests may need other card instead)
* PS/2 keyboard and mouse
@@ -83,9 +88,9 @@ Emulated devices
Firmware
--------
-The Pegasos II board has an Open Firmware compliant ROM based on
+The Pegasos boards have an Open Firmware compliant ROM based on
SmartFirmware with some changes that are not open-sourced therefore
-the ROM binary cannot be included in QEMU. An updater was available
+the ROM binary cannot be included in QEMU. A Pegasos II updater was available
from bPlan, it can be found in the `Internet Archive
<http://web.archive.org/web/20071021223056/http://www.bplan-gmbh.de/up050404/up050404>`_.
The ROM image can be extracted from it with the following command:
@@ -111,7 +116,7 @@ At the firmware ``ok`` prompt enter ``boot cd install/pegasos``.
Alternatively, it is possible to boot the kernel directly without
firmware ROM using the QEMU built-in minimal Virtual Open Firmware
-(VOF) emulation which is also supported on ``pegasos2``. For this,
+(VOF) emulation which is also supported on ``pegasos1`` and ``pegasos2``. For this,
extract the kernel ``install/powerpc/vmlinuz-chrp.initrd`` from the CD
image, then run:
--
2.43.5
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PULL 00/10] ppc-for-10.2-d4 queue
2025-10-30 8:49 [PULL 00/10] ppc-for-10.2-d4 queue Harsh Prateek Bora
` (7 preceding siblings ...)
2025-10-30 8:49 ` [PULL 10/10] hw/ppc/pegasos: Update documentation for pegasos1 Harsh Prateek Bora
@ 2025-11-01 9:50 ` Richard Henderson
8 siblings, 0 replies; 10+ messages in thread
From: Richard Henderson @ 2025-11-01 9:50 UTC (permalink / raw)
To: qemu-devel
On 10/30/25 09:49, Harsh Prateek Bora wrote:
> The following changes since commit e090e0312dc9030d94e38e3d98a88718d3561e4e:
>
> Merge tag 'pull-trivial-patches' ofhttps://gitlab.com/mjt0k/qemu into staging (2025-10-29 10:44:15 +0100)
>
> are available in the Git repository at:
>
> https://gitlab.com/harshpb/qemu.git tags/pull-ppc-for-10.2-d4-20251030
>
> for you to fetch changes up to 5795c7650e4b149e19020f95cc4892bf7b2beef6:
>
> hw/ppc/pegasos: Update documentation for pegasos1 (2025-10-30 13:40:38 +0530)
>
> ----------------------------------------------------------------
> ppc queue for 10.2
>
> * Firmware updates for SLOF, sam460ex u-boot
> * Removal of unusable e200 CPUs
> * Coverity fixes for fadump
> * Other minor fixes, cleanups for pegasos, spapr.
Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/10.2 as appropriate.
r~
^ permalink raw reply [flat|nested] 10+ messages in thread