From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 23/38] target/arm/hvf: Simplify hvf_arm_get_host_cpu_features()
Date: Fri, 31 Oct 2025 18:32:55 +0000 [thread overview]
Message-ID: <20251031183310.3778349-24-peter.maydell@linaro.org> (raw)
In-Reply-To: <20251031183310.3778349-1-peter.maydell@linaro.org>
From: Philippe Mathieu-Daudé <philmd@linaro.org>
Use index in the structure, dereference &host_isar.idregs[] once.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/hvf/hvf.c | 25 +++++++++++++------------
1 file changed, 13 insertions(+), 12 deletions(-)
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 890e9266f93..dea1cb37d1f 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -743,21 +743,21 @@ static void clamp_id_aa64mmfr0_parange_to_ipa_size(ARMISARegisters *isar)
static bool hvf_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
{
ARMISARegisters host_isar = {};
- const struct isar_regs {
+ static const struct isar_regs {
int reg;
- uint64_t *val;
+ ARMIDRegisterIdx index;
} regs[] = {
- { HV_SYS_REG_ID_AA64PFR0_EL1, &host_isar.idregs[ID_AA64PFR0_EL1_IDX] },
- { HV_SYS_REG_ID_AA64PFR1_EL1, &host_isar.idregs[ID_AA64PFR1_EL1_IDX] },
+ { HV_SYS_REG_ID_AA64PFR0_EL1, ID_AA64PFR0_EL1_IDX },
+ { HV_SYS_REG_ID_AA64PFR1_EL1, ID_AA64PFR1_EL1_IDX },
/* Add ID_AA64PFR2_EL1 here when HVF supports it */
- { HV_SYS_REG_ID_AA64DFR0_EL1, &host_isar.idregs[ID_AA64DFR0_EL1_IDX] },
- { HV_SYS_REG_ID_AA64DFR1_EL1, &host_isar.idregs[ID_AA64DFR1_EL1_IDX] },
- { HV_SYS_REG_ID_AA64ISAR0_EL1, &host_isar.idregs[ID_AA64ISAR0_EL1_IDX] },
- { HV_SYS_REG_ID_AA64ISAR1_EL1, &host_isar.idregs[ID_AA64ISAR1_EL1_IDX] },
+ { HV_SYS_REG_ID_AA64DFR0_EL1, ID_AA64DFR0_EL1_IDX },
+ { HV_SYS_REG_ID_AA64DFR1_EL1, ID_AA64DFR1_EL1_IDX },
+ { HV_SYS_REG_ID_AA64ISAR0_EL1, ID_AA64ISAR0_EL1_IDX },
+ { HV_SYS_REG_ID_AA64ISAR1_EL1, ID_AA64ISAR1_EL1_IDX },
/* Add ID_AA64ISAR2_EL1 here when HVF supports it */
- { HV_SYS_REG_ID_AA64MMFR0_EL1, &host_isar.idregs[ID_AA64MMFR0_EL1_IDX] },
- { HV_SYS_REG_ID_AA64MMFR1_EL1, &host_isar.idregs[ID_AA64MMFR1_EL1_IDX] },
- { HV_SYS_REG_ID_AA64MMFR2_EL1, &host_isar.idregs[ID_AA64MMFR2_EL1_IDX] },
+ { HV_SYS_REG_ID_AA64MMFR0_EL1, ID_AA64MMFR0_EL1_IDX },
+ { HV_SYS_REG_ID_AA64MMFR1_EL1, ID_AA64MMFR1_EL1_IDX },
+ { HV_SYS_REG_ID_AA64MMFR2_EL1, ID_AA64MMFR2_EL1_IDX },
/* Add ID_AA64MMFR3_EL1 here when HVF supports it */
};
hv_vcpu_t fd;
@@ -780,7 +780,8 @@ static bool hvf_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
}
for (i = 0; i < ARRAY_SIZE(regs); i++) {
- r |= hv_vcpu_get_sys_reg(fd, regs[i].reg, regs[i].val);
+ r |= hv_vcpu_get_sys_reg(fd, regs[i].reg,
+ &host_isar.idregs[regs[i].index]);
}
r |= hv_vcpu_destroy(fd);
--
2.43.0
next prev parent reply other threads:[~2025-10-31 18:36 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-31 18:32 [PULL 00/38] target-arm queue Peter Maydell
2025-10-31 18:32 ` [PULL 01/38] hw/gpio/pl061: Declare pullups/pulldowns as 8-bit types Peter Maydell
2025-10-31 18:32 ` [PULL 02/38] docs/system/arm/virt: Document user-creatable SMMUv3 Peter Maydell
2025-10-31 18:32 ` [PULL 03/38] docs/system/security: Restrict "virtualization use case" to specific machines Peter Maydell
2025-10-31 18:32 ` [PULL 04/38] target/arm: Add assert to arm_to_core_mmu_idx() Peter Maydell
2025-10-31 18:32 ` [PULL 05/38] hw/arm/virt: Remove deprecated virt-4.1 machine Peter Maydell
2025-10-31 18:32 ` [PULL 06/38] hw/arm/virt: Remove VirtMachineClass::no_ged field Peter Maydell
2025-10-31 18:32 ` [PULL 07/38] hw/arm/virt: Remove deprecated virt-4.2 machine Peter Maydell
2025-10-31 18:32 ` [PULL 08/38] hw/arm/virt: Remove VirtMachineClass::kvm_no_adjvtime field Peter Maydell
2025-10-31 18:32 ` [PULL 09/38] target/arm/hvf: Release memory allocated by hv_vcpu_config_create() Peter Maydell
2025-10-31 18:32 ` [PULL 10/38] target/arm/hvf: Trace vCPU KICK events Peter Maydell
2025-10-31 18:32 ` [PULL 11/38] target/arm/hvf: Check hv_vcpus_exit() returned value Peter Maydell
2025-10-31 18:32 ` [PULL 12/38] target/arm/hvf: Check hv_vcpu_set_vtimer_mask() " Peter Maydell
2025-10-31 18:32 ` [PULL 13/38] accel/hvf: Rename hvf_vcpu_exec() -> hvf_arch_vcpu_exec() Peter Maydell
2025-10-31 18:32 ` [PULL 14/38] accel/hvf: Rename hvf_put|get_registers -> hvf_arch_put|get_registers Peter Maydell
2025-10-31 18:32 ` [PULL 15/38] target/arm/hvf: Mention flush_cpu_state() must run on vCPU thread Peter Maydell
2025-10-31 18:32 ` [PULL 16/38] accel/hvf: Mention hvf_arch_init_vcpu() " Peter Maydell
2025-10-31 18:32 ` [PULL 17/38] target/arm/hvf: Mention hvf_sync_vtimer() " Peter Maydell
2025-10-31 18:32 ` [PULL 18/38] target/arm/hvf: Mention hvf_arch_set_traps() " Peter Maydell
2025-10-31 18:32 ` [PULL 19/38] accel/hvf: Mention hvf_arch_update_guest_debug() must run on vCPU Peter Maydell
2025-10-31 18:32 ` [PULL 20/38] target/arm/hvf: Mention hvf_inject_interrupts() must run on vCPU thread Peter Maydell
2025-10-31 18:32 ` [PULL 21/38] accel/hvf: Implement hvf_arch_vcpu_destroy() Peter Maydell
2025-10-31 18:32 ` [PULL 22/38] target/arm/hvf: Hardcode Apple MIDR Peter Maydell
2025-10-31 18:32 ` Peter Maydell [this message]
2025-10-31 18:32 ` [PULL 24/38] target/arm/hvf: switch hvf_arm_get_host_cpu_features to not create a vCPU Peter Maydell
2025-10-31 18:32 ` [PULL 25/38] target/arm/hvf: Factor hvf_handle_exception() out Peter Maydell
2025-10-31 18:32 ` [PULL 26/38] target/i386/hvf: Factor hvf_handle_vmexit() out Peter Maydell
2025-10-31 18:32 ` [PULL 27/38] target/arm/hvf: " Peter Maydell
2025-10-31 18:33 ` [PULL 28/38] target/arm/hvf: Keep calling hv_vcpu_run() in loop Peter Maydell
2025-10-31 18:33 ` [PULL 29/38] cpus: Trace cpu_exec_start() and cpu_exec_end() calls Peter Maydell
2025-10-31 18:33 ` [PULL 30/38] accel/hvf: Guard hv_vcpu_run() between cpu_exec_start/end() calls Peter Maydell
2025-10-31 18:33 ` [PULL 31/38] target/arm: Call aarch64_add_pauth_properties() once in host_initfn() Peter Maydell
2025-10-31 18:33 ` [PULL 32/38] accel/hvf: Restrict ARM specific fields of AccelCPUState Peter Maydell
2025-10-31 18:33 ` [PULL 33/38] target/arm: Rename init_cpreg_list() -> arm_init_cpreg_list() Peter Maydell
2025-10-31 18:33 ` [PULL 34/38] target/arm/hvf: Rename 'vgic' -> 'emu_reginfo' in trace events Peter Maydell
2025-10-31 18:33 ` [PULL 35/38] target/arm: Re-use arm_is_psci_call() in HVF Peter Maydell
2025-10-31 18:33 ` [PULL 36/38] target/arm: Share ARM_PSCI_CALL trace event between TCG and HVF Peter Maydell
2025-10-31 18:33 ` [PULL 37/38] target/arm/hvf/hvf: Document $pc adjustment in HVF & SMC Peter Maydell
2025-10-31 18:33 ` [PULL 38/38] accel/hvf: Trace prefetch abort Peter Maydell
2025-11-01 11:11 ` [PULL 00/38] target-arm queue Richard Henderson
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