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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 02/38] docs/system/arm/virt: Document user-creatable SMMUv3
Date: Fri, 31 Oct 2025 18:32:34 +0000	[thread overview]
Message-ID: <20251031183310.3778349-3-peter.maydell@linaro.org> (raw)
In-Reply-To: <20251031183310.3778349-1-peter.maydell@linaro.org>

The virt machine now supports creating multiple SMMUv3 instances, each
associated with a separate PCIe root complex.

Update the documentation with an example.

Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com>
[PMM: some minor wording tweaks]

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 docs/system/arm/virt.rst | 35 +++++++++++++++++++++++++++++++++--
 1 file changed, 33 insertions(+), 2 deletions(-)

diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst
index 10cbffc8a70..e5570773ba1 100644
--- a/docs/system/arm/virt.rst
+++ b/docs/system/arm/virt.rst
@@ -37,7 +37,8 @@ The virt board supports:
 - An RTC
 - The fw_cfg device that allows a guest to obtain data from QEMU
 - A PL061 GPIO controller
-- An optional SMMUv3 IOMMU
+- An optional machine-wide SMMUv3 IOMMU
+- User-creatable SMMUv3 devices (see below for example)
 - hotpluggable DIMMs
 - hotpluggable NVDIMMs
 - An MSI controller (GICv2M or ITS). GICv2M is selected by default along
@@ -176,7 +177,7 @@ iommu
   ``none``
     Don't create an IOMMU (the default)
   ``smmuv3``
-    Create an SMMUv3
+    Create a machine-wide SMMUv3.
 
 default-bus-bypass-iommu
   Set ``on``/``off`` to enable/disable `bypass_iommu
@@ -219,6 +220,36 @@ x-oem-table-id
   Set string (up to 8 bytes) to override the default value of field OEM Table ID
   in ACPI table header.
 
+SMMU configuration
+""""""""""""""""""
+
+Machine-wide SMMUv3 IOMMU
+  Setting the machine-specific option ``iommu=smmuv3`` causes QEMU to
+  create a single, machine-wide SMMUv3 instance that applies to all
+  devices in the PCIe topology.
+
+  For information about selectively bypassing devices, refer to
+  ``docs/bypass-iommu.txt``.
+
+User-creatable SMMUv3 devices
+  You can use the ``-device arm-smmuv3`` option to create multiple
+  user-defined SMMUv3 devices, each associated with a separate PCIe
+  root complex. This is only permitted if the machine-wide SMMUv3
+  (``iommu=smmuv3``) option is not used. Each ``arm-smmuv3`` device
+  uses the ``primary-bus`` sub-option to specify which PCIe root
+  complex it is associated with.
+
+  This model is useful when you want to mirror a host configuration where
+  each NUMA node typically has its own SMMU, allowing the VM topology to
+  align more closely with the host’s hardware layout.
+
+  Example::
+
+      -device arm-smmuv3,primary-bus=pcie.0,id=smmuv3.0
+      ...
+      -device pxb-pcie,id=pcie.1,numa_node=1
+      -device arm-smmuv3,primary-bus=pcie.1,id=smmuv3.1
+
 Linux guest kernel configuration
 """"""""""""""""""""""""""""""""
 
-- 
2.43.0



  parent reply	other threads:[~2025-10-31 18:34 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-31 18:32 [PULL 00/38] target-arm queue Peter Maydell
2025-10-31 18:32 ` [PULL 01/38] hw/gpio/pl061: Declare pullups/pulldowns as 8-bit types Peter Maydell
2025-10-31 18:32 ` Peter Maydell [this message]
2025-10-31 18:32 ` [PULL 03/38] docs/system/security: Restrict "virtualization use case" to specific machines Peter Maydell
2025-10-31 18:32 ` [PULL 04/38] target/arm: Add assert to arm_to_core_mmu_idx() Peter Maydell
2025-10-31 18:32 ` [PULL 05/38] hw/arm/virt: Remove deprecated virt-4.1 machine Peter Maydell
2025-10-31 18:32 ` [PULL 06/38] hw/arm/virt: Remove VirtMachineClass::no_ged field Peter Maydell
2025-10-31 18:32 ` [PULL 07/38] hw/arm/virt: Remove deprecated virt-4.2 machine Peter Maydell
2025-10-31 18:32 ` [PULL 08/38] hw/arm/virt: Remove VirtMachineClass::kvm_no_adjvtime field Peter Maydell
2025-10-31 18:32 ` [PULL 09/38] target/arm/hvf: Release memory allocated by hv_vcpu_config_create() Peter Maydell
2025-10-31 18:32 ` [PULL 10/38] target/arm/hvf: Trace vCPU KICK events Peter Maydell
2025-10-31 18:32 ` [PULL 11/38] target/arm/hvf: Check hv_vcpus_exit() returned value Peter Maydell
2025-10-31 18:32 ` [PULL 12/38] target/arm/hvf: Check hv_vcpu_set_vtimer_mask() " Peter Maydell
2025-10-31 18:32 ` [PULL 13/38] accel/hvf: Rename hvf_vcpu_exec() -> hvf_arch_vcpu_exec() Peter Maydell
2025-10-31 18:32 ` [PULL 14/38] accel/hvf: Rename hvf_put|get_registers -> hvf_arch_put|get_registers Peter Maydell
2025-10-31 18:32 ` [PULL 15/38] target/arm/hvf: Mention flush_cpu_state() must run on vCPU thread Peter Maydell
2025-10-31 18:32 ` [PULL 16/38] accel/hvf: Mention hvf_arch_init_vcpu() " Peter Maydell
2025-10-31 18:32 ` [PULL 17/38] target/arm/hvf: Mention hvf_sync_vtimer() " Peter Maydell
2025-10-31 18:32 ` [PULL 18/38] target/arm/hvf: Mention hvf_arch_set_traps() " Peter Maydell
2025-10-31 18:32 ` [PULL 19/38] accel/hvf: Mention hvf_arch_update_guest_debug() must run on vCPU Peter Maydell
2025-10-31 18:32 ` [PULL 20/38] target/arm/hvf: Mention hvf_inject_interrupts() must run on vCPU thread Peter Maydell
2025-10-31 18:32 ` [PULL 21/38] accel/hvf: Implement hvf_arch_vcpu_destroy() Peter Maydell
2025-10-31 18:32 ` [PULL 22/38] target/arm/hvf: Hardcode Apple MIDR Peter Maydell
2025-10-31 18:32 ` [PULL 23/38] target/arm/hvf: Simplify hvf_arm_get_host_cpu_features() Peter Maydell
2025-10-31 18:32 ` [PULL 24/38] target/arm/hvf: switch hvf_arm_get_host_cpu_features to not create a vCPU Peter Maydell
2025-10-31 18:32 ` [PULL 25/38] target/arm/hvf: Factor hvf_handle_exception() out Peter Maydell
2025-10-31 18:32 ` [PULL 26/38] target/i386/hvf: Factor hvf_handle_vmexit() out Peter Maydell
2025-10-31 18:32 ` [PULL 27/38] target/arm/hvf: " Peter Maydell
2025-10-31 18:33 ` [PULL 28/38] target/arm/hvf: Keep calling hv_vcpu_run() in loop Peter Maydell
2025-10-31 18:33 ` [PULL 29/38] cpus: Trace cpu_exec_start() and cpu_exec_end() calls Peter Maydell
2025-10-31 18:33 ` [PULL 30/38] accel/hvf: Guard hv_vcpu_run() between cpu_exec_start/end() calls Peter Maydell
2025-10-31 18:33 ` [PULL 31/38] target/arm: Call aarch64_add_pauth_properties() once in host_initfn() Peter Maydell
2025-10-31 18:33 ` [PULL 32/38] accel/hvf: Restrict ARM specific fields of AccelCPUState Peter Maydell
2025-10-31 18:33 ` [PULL 33/38] target/arm: Rename init_cpreg_list() -> arm_init_cpreg_list() Peter Maydell
2025-10-31 18:33 ` [PULL 34/38] target/arm/hvf: Rename 'vgic' -> 'emu_reginfo' in trace events Peter Maydell
2025-10-31 18:33 ` [PULL 35/38] target/arm: Re-use arm_is_psci_call() in HVF Peter Maydell
2025-10-31 18:33 ` [PULL 36/38] target/arm: Share ARM_PSCI_CALL trace event between TCG and HVF Peter Maydell
2025-10-31 18:33 ` [PULL 37/38] target/arm/hvf/hvf: Document $pc adjustment in HVF & SMC Peter Maydell
2025-10-31 18:33 ` [PULL 38/38] accel/hvf: Trace prefetch abort Peter Maydell
2025-11-01 11:11 ` [PULL 00/38] target-arm queue Richard Henderson

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