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From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>,
	<kane_chen@aspeedtech.com>
Subject: [PATCH v3 21/30] hw/arm/aspeed: Split QCOM Firework machine into a separate source file for maintainability
Date: Mon, 3 Nov 2025 17:27:32 +0800	[thread overview]
Message-ID: <20251103092801.1282602-22-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20251103092801.1282602-1-jamin_lin@aspeedtech.com>

This commit moves the QCOM Firework BMC machine implementation out of
aspeed.c into a new standalone file aspeed_ast2600_qcom-firework.c.

This refactor continues the modularization effort for Aspeed platform support,
placing each board’s logic in its own dedicated source file. It improves
maintainability, readability, and simplifies future development for new
platforms without cluttering aspeed.c.

Key updates include:
- Removed qcom_dc_scm_firework_i2c_init() and its Firework-specific devices
  from aspeed.c.
- Removed aspeed_machine_qcom_firework_class_init() and its type registration
  ("qcom-firework-bmc") from aspeed_machine_types[].
- Added new source file aspeed_ast2600_qcom-firework.c containing the
  Firework-specific initialization and machine class definition.
- Updated hw/arm/meson.build to include aspeed_ast2600_qcom-firework.c.
- Cleaned up all Firework-specific code from aspeed.c.
- Renamed `QCOM_DC_SCM_V1_BMC_HW_STRAP1` to
  `QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP1` to avoid dependency conflicts with
  other QCOM DC-SCM machines.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 hw/arm/aspeed.c                       | 57 -----------------
 hw/arm/aspeed_ast2600_qcom-firework.c | 92 +++++++++++++++++++++++++++
 hw/arm/meson.build                    |  1 +
 3 files changed, 93 insertions(+), 57 deletions(-)
 create mode 100644 hw/arm/aspeed_ast2600_qcom-firework.c

diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 29a036b675..f72b1e2eea 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -635,38 +635,6 @@ static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc)
     i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d);
 }
 
-static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc)
-{
-    AspeedSoCState *soc = bmc->soc;
-    I2CSlave *therm_mux, *cpuvr_mux;
-
-    /* Create the generic DC-SCM hardware */
-    qcom_dc_scm_bmc_i2c_init(bmc);
-
-    /* Now create the Firework specific hardware */
-
-    /* I2C7 CPUVR MUX */
-    cpuvr_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7),
-                                        "pca9546", 0x70);
-    i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 0), "pca9548", 0x72);
-    i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 1), "pca9548", 0x72);
-    i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 2), "pca9548", 0x72);
-    i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 3), "pca9548", 0x72);
-
-    /* I2C8 Thermal Diodes*/
-    therm_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8),
-                                        "pca9548", 0x70);
-    i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 0), TYPE_LM75, 0x4C);
-    i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 1), TYPE_LM75, 0x4C);
-    i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 2), TYPE_LM75, 0x48);
-    i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 3), TYPE_LM75, 0x48);
-    i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 4), TYPE_LM75, 0x48);
-
-    /* I2C9 Fan Controller (MAX31785) */
-    i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x52);
-    i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x54);
-}
-
 static bool aspeed_get_mmio_exec(Object *obj, Error **errp)
 {
     return ASPEED_MACHINE(obj)->mmio_exec;
@@ -1063,26 +1031,6 @@ static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
     aspeed_machine_class_init_cpus_defaults(mc);
 };
 
-static void aspeed_machine_qcom_firework_class_init(ObjectClass *oc,
-                                                    const void *data)
-{
-    MachineClass *mc = MACHINE_CLASS(oc);
-    AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
-
-    mc->desc       = "Qualcomm DC-SCM V1/Firework BMC (Cortex A7)";
-    mc->deprecation_reason = "use 'ast2600-evb' instead";
-    amc->soc_name  = "ast2600-a3";
-    amc->hw_strap1 = QCOM_DC_SCM_V1_BMC_HW_STRAP1;
-    amc->hw_strap2 = QCOM_DC_SCM_V1_BMC_HW_STRAP2;
-    amc->fmc_model = "n25q512a";
-    amc->spi_model = "n25q512a";
-    amc->num_cs    = 2;
-    amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
-    amc->i2c_init  = qcom_dc_scm_firework_i2c_init;
-    mc->default_ram_size = 1 * GiB;
-    aspeed_machine_class_init_cpus_defaults(mc);
-};
-
 static const TypeInfo aspeed_machine_types[] = {
     {
         .name          = MACHINE_TYPE_NAME("ast2600-evb"),
@@ -1094,11 +1042,6 @@ static const TypeInfo aspeed_machine_types[] = {
         .parent        = TYPE_ASPEED_MACHINE,
         .class_init    = aspeed_machine_qcom_dc_scm_v1_class_init,
         .interfaces    = arm_machine_interfaces,
-    }, {
-        .name          = MACHINE_TYPE_NAME("qcom-firework-bmc"),
-        .parent        = TYPE_ASPEED_MACHINE,
-        .class_init    = aspeed_machine_qcom_firework_class_init,
-        .interfaces    = arm_machine_interfaces,
     }, {
         .name          = MACHINE_TYPE_NAME("rainier-bmc"),
         .parent        = TYPE_ASPEED_MACHINE,
diff --git a/hw/arm/aspeed_ast2600_qcom-firework.c b/hw/arm/aspeed_ast2600_qcom-firework.c
new file mode 100644
index 0000000000..d040b9c63b
--- /dev/null
+++ b/hw/arm/aspeed_ast2600_qcom-firework.c
@@ -0,0 +1,92 @@
+/*
+ * Qualcomm DC-SCM V1/Firework
+ *
+ * Copyright (C) 2025 ASPEED Technology Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/i2c/i2c_mux_pca954x.h"
+#include "hw/sensor/tmp105.h"
+
+/* Qualcomm DC-SCM Firework hardware value */
+#define QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP1  0x00000000
+#define QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP2  0x00000041
+
+#define TYPE_LM75 TYPE_TMP105
+
+static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc)
+{
+    AspeedSoCState *soc = bmc->soc;
+
+    i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d);
+}
+
+static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc)
+{
+    AspeedSoCState *soc = bmc->soc;
+    I2CSlave *therm_mux, *cpuvr_mux;
+
+    /* Create the generic DC-SCM hardware */
+    qcom_dc_scm_bmc_i2c_init(bmc);
+
+    /* Now create the Firework specific hardware */
+
+    /* I2C7 CPUVR MUX */
+    cpuvr_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7),
+                                        "pca9546", 0x70);
+    i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 0), "pca9548", 0x72);
+    i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 1), "pca9548", 0x72);
+    i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 2), "pca9548", 0x72);
+    i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 3), "pca9548", 0x72);
+
+    /* I2C8 Thermal Diodes*/
+    therm_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8),
+                                        "pca9548", 0x70);
+    i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 0), TYPE_LM75, 0x4C);
+    i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 1), TYPE_LM75, 0x4C);
+    i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 2), TYPE_LM75, 0x48);
+    i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 3), TYPE_LM75, 0x48);
+    i2c_slave_create_simple(pca954x_i2c_get_bus(therm_mux, 4), TYPE_LM75, 0x48);
+
+    /* I2C9 Fan Controller (MAX31785) */
+    i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x52);
+    i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x54);
+}
+
+static void aspeed_machine_qcom_firework_class_init(ObjectClass *oc,
+                                                    const void *data)
+{
+    MachineClass *mc = MACHINE_CLASS(oc);
+    AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+    mc->desc       = "Qualcomm DC-SCM V1/Firework BMC (Cortex A7)";
+    mc->deprecation_reason = "use 'ast2600-evb' instead";
+    amc->soc_name  = "ast2600-a3";
+    amc->hw_strap1 = QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP1;
+    amc->hw_strap2 = QCOM_DC_SCM_FIREWORK_BMC_HW_STRAP2;
+    amc->fmc_model = "n25q512a";
+    amc->spi_model = "n25q512a";
+    amc->num_cs    = 2;
+    amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON;
+    amc->i2c_init  = qcom_dc_scm_firework_i2c_init;
+    mc->default_ram_size = 1 * GiB;
+    aspeed_machine_class_init_cpus_defaults(mc);
+};
+
+static const TypeInfo aspeed_ast2600_qcom_firework_types[] = {
+    {
+        .name          = MACHINE_TYPE_NAME("qcom-firework-bmc"),
+        .parent        = TYPE_ASPEED_MACHINE,
+        .class_init    = aspeed_machine_qcom_firework_class_init,
+        .interfaces    = arm_machine_interfaces,
+    }
+};
+
+DEFINE_TYPES(aspeed_ast2600_qcom_firework_types)
+
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index e6f6ab4245..fbe063cf0b 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -60,6 +60,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
   'aspeed_ast2600_bletchley.c',
   'aspeed_ast2600_fby35.c',
   'aspeed_ast2600_fuji.c',
+  'aspeed_ast2600_qcom-firework.c',
   'aspeed_ast10x0.c',
   'aspeed_eeprom.c',
   'fby35.c'))
-- 
2.43.0



  parent reply	other threads:[~2025-11-03  9:35 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-03  9:27 [PATCH v3 00/30] Split AST2400, AST2500, AST2600, AST2700 and AST1030 SoC machines into separate source files for maintainability Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 01/30] hw/arm/aspeed: Move AspeedMachineState definition to common header for reuse Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 02/30] hw/arm/aspeed: Make aspeed_machine_class_init_cpus_defaults() globally accessible Jamin Lin via
2025-11-03  9:59   ` [SPAM] " Cédric Le Goater
2025-11-03  9:27 ` [PATCH v3 03/30] hw/arm/aspeed: Export and rename create_pca9552() for reuse Jamin Lin via
2025-11-03  9:59   ` [SPAM] " Cédric Le Goater
2025-11-03 10:21   ` Cédric Le Goater
2025-11-04  2:01     ` Jamin Lin
2025-11-03  9:27 ` [PATCH v3 04/30] hw/arm/aspeed: Rename and export create_pca9554() as aspeed_create_pca9554() Jamin Lin via
2025-11-03 10:14   ` [SPAM] " Cédric Le Goater
2025-11-03  9:27 ` [PATCH v3 05/30] hw/arm/aspeed: Split FP5280G2 machine into a separate source file for maintenance Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 06/30] hw/arm/aspeed: Split G220A machine into a separate source file for better maintenance Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 07/30] hw/arm/aspeed: Split Tiogapass machine into a separate source file for cleanup Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 08/30] hw/arm/aspeed: Split YosemiteV2 machine into a separate source file for maintainability Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 09/30] hw/arm/aspeed: Split Witherspoon " Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 10/30] hw/arm/aspeed: Split Sonorapass " Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 11/30] hw/arm/aspeed: Split Romulus " Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 12/30] hw/arm/aspeed: Split Supermicro X11SPI machine into a separate " Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 13/30] hw/arm/aspeed: Split AST2500 EVB machine into a separate source " Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 14/30] hw/arm/aspeed: Split Quanta-Q71L " Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 15/30] hw/arm/aspeed: Split Supermicro X11 " Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 16/30] hw/arm/aspeed: Split Palmetto " Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 17/30] hw/arm/aspeed: Move ASPEED_RAM_SIZE() macro to common header for reuse Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 18/30] hw/arm/aspeed: Split Bletchley machine into a separate source file for maintainability Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 19/30] hw/arm/aspeed: Split FBY35 BMC " Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 20/30] hw/arm/aspeed: Split Fuji " Jamin Lin via
2025-11-03  9:27 ` Jamin Lin via [this message]
2025-11-03  9:27 ` [PATCH v3 22/30] hw/arm/aspeed: Split QCOM DC-SCM V1 " Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 23/30] hw/arm/aspeed: Make aspeed_machine_ast2600_class_emmc_init() a common API for eMMC boot setup Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 24/30] hw/arm/aspeed: Split GB200NVL machine into a separate source file for maintainability Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 25/30] hw/arm/aspeed: Split Rainier " Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 26/30] hw/arm/aspeed: Split Catalina " Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 27/30] hw/arm/aspeed: Split AST2600 EVB " Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 28/30] hw/arm/aspeed: Split AST2700 " Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 29/30] hw/arm/aspeed: Rename and export connect_serial_hds_to_uarts() as aspeed_connect_serial_hds_to_uarts() Jamin Lin via
2025-11-03  9:27 ` [PATCH v3 30/30] hw/arm/aspeed: Split AST1030 EVB machine into a separate source file for maintainability Jamin Lin via
2025-11-03 10:23 ` [SPAM] [PATCH v3 00/30] Split AST2400, AST2500, AST2600, AST2700 and AST1030 SoC machines into separate source files " Cédric Le Goater
2025-11-04  2:02   ` Jamin Lin

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