From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 56D94CCFA04 for ; Mon, 3 Nov 2025 09:34:31 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vFqwe-0007Ym-97; Mon, 03 Nov 2025 04:33:48 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vFqvA-0005xP-Le; Mon, 03 Nov 2025 04:32:20 -0500 Received: from mail.aspeedtech.com ([211.20.114.72] helo=TWMBX01.aspeed.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vFqv0-0002z3-Nf; Mon, 03 Nov 2025 04:32:16 -0500 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 3 Nov 2025 17:28:22 +0800 Received: from mail.aspeedtech.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 3 Nov 2025 17:28:22 +0800 To: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Steven Lee , Troy Lee , Andrew Jeffery , "Joel Stanley" , "open list:All patches CC here" , "open list:ASPEED BMCs" CC: , , Subject: [PATCH v3 29/30] hw/arm/aspeed: Rename and export connect_serial_hds_to_uarts() as aspeed_connect_serial_hds_to_uarts() Date: Mon, 3 Nov 2025 17:27:40 +0800 Message-ID: <20251103092801.1282602-30-jamin_lin@aspeedtech.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251103092801.1282602-1-jamin_lin@aspeedtech.com> References: <20251103092801.1282602-1-jamin_lin@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: pass client-ip=211.20.114.72; envelope-from=jamin_lin@aspeedtech.com; helo=TWMBX01.aspeed.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_FAIL=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jamin Lin From: Jamin Lin via Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The helper function connect_serial_hds_to_uarts() has been renamed to aspeed_connect_serial_hds_to_uarts() and promoted to a public Aspeed machine API. Previously, this function was declared static within aspeed.c and only used internally. Renaming it with the aspeed_ prefix and exporting its declaration in aspeed.h makes the function accessible to other Aspeed machine implementations that need to attach host serial devices to SoC UARTs. No functional changes. Signed-off-by: Jamin Lin --- include/hw/arm/aspeed.h | 14 ++++++++++++++ hw/arm/aspeed.c | 6 +++--- 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h index fc8ff9b9ec..6233954584 100644 --- a/include/hw/arm/aspeed.h +++ b/include/hw/arm/aspeed.h @@ -111,4 +111,18 @@ I2CSlave *aspeed_create_pca9554(AspeedSoCState *soc, int bus_id, int addr); */ void aspeed_machine_ast2600_class_emmc_init(ObjectClass *oc); +/* + * aspeed_connect_serial_hds_to_uarts: + * @bmc: pointer to the #AspeedMachineState. + * + * Connect host serial backends (character devices) to the UART interfaces + * of the Aspeed SoC used by the given BMC machine. + * + * The function assigns `serial_hd(0)` to the primary UART channel + * (either chosen via `bmc->uart_chosen` or the machine class default), + * and iteratively connects remaining serial ports to other available UARTs + * on the SoC based on their index. + */ +void aspeed_connect_serial_hds_to_uarts(AspeedMachineState *bmc); + #endif diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 924c02bcb8..7e9cd532d1 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -118,7 +118,7 @@ static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo, bool emmc, &error_fatal); } -static void connect_serial_hds_to_uarts(AspeedMachineState *bmc) +void aspeed_connect_serial_hds_to_uarts(AspeedMachineState *bmc) { AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(bmc); AspeedSoCState *s = bmc->soc; @@ -189,7 +189,7 @@ static void aspeed_machine_init(MachineState *machine) object_property_set_int(OBJECT(bmc->soc), "hw-prot-key", ASPEED_SCU_PROT_KEY, &error_abort); } - connect_serial_hds_to_uarts(bmc); + aspeed_connect_serial_hds_to_uarts(bmc); qdev_realize(DEVICE(bmc->soc), NULL, &error_abort); if (defaults_enabled()) { @@ -444,7 +444,7 @@ static void aspeed_minibmc_machine_init(MachineState *machine) object_property_set_link(OBJECT(bmc->soc), "memory", OBJECT(get_system_memory()), &error_abort); - connect_serial_hds_to_uarts(bmc); + aspeed_connect_serial_hds_to_uarts(bmc); qdev_realize(DEVICE(bmc->soc), NULL, &error_abort); if (defaults_enabled()) { -- 2.43.0