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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Roman Bolshakov" <rbolshakov@ddn.com>,
	"Alexander Graf" <agraf@csgraf.de>,
	"Phil Dennis-Jordan" <phil@philjordan.eu>,
	qemu-arm@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Akihiko Odaki" <odaki@rsg.ci.i.u-tokyo.ac.jp>,
	"Peter Collingbourne" <pcc@google.com>,
	"Cameron Esfahani" <dirty@apple.com>,
	"Mads Ynddal" <mads@ynddal.dk>,
	"Mohamed Mediouni" <mohamed@unpredictable.fr>
Subject: [PATCH v4 23/23] accel/hvf: Sync CNTV_CTL_EL0 & CNTV_CVAL_EL0
Date: Mon,  3 Nov 2025 11:10:32 +0100	[thread overview]
Message-ID: <20251103101034.59039-24-philmd@linaro.org> (raw)
In-Reply-To: <20251103101034.59039-1-philmd@linaro.org>

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/arm/hvf/hvf.c | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 268a0bcd8ea..60378075882 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -200,6 +200,9 @@ void hvf_arm_init_debug(void)
 #define SYSREG_PMCEID0_EL0    SYSREG(3, 3, 9, 12, 6)
 #define SYSREG_PMCEID1_EL0    SYSREG(3, 3, 9, 12, 7)
 #define SYSREG_PMCCNTR_EL0    SYSREG(3, 3, 9, 13, 0)
+
+#define SYSREG_CNTV_CTL_EL0   SYSREG(3, 3, 14, 3, 1)
+#define SYSREG_CNTV_CVAL_EL0  SYSREG(3, 3, 14, 3, 2)
 #define SYSREG_PMCCFILTR_EL0  SYSREG(3, 3, 14, 15, 7)
 
 #define SYSREG_ICC_AP0R0_EL1     SYSREG(3, 0, 12, 8, 4)
@@ -2017,13 +2020,49 @@ static int hvf_handle_vmexit(CPUState *cpu, hv_vcpu_exit_t *exit)
     return ret;
 }
 
+static void hvf_sync_vtimer_pre_exec(CPUState *cpu)
+{
+    hv_return_t r;
+    uint64_t val;
+    bool b;
+
+    b = hvf_sysreg_read_cp(cpu, "VTimer", SYSREG_CNTV_CVAL_EL0, &val);
+    assert(b);
+    r = hv_vcpu_set_sys_reg(cpu->accel->fd, HV_SYS_REG_CNTV_CVAL_EL0, val);
+    assert_hvf_ok(r);
+
+    b = hvf_sysreg_read_cp(cpu, "VTimer", SYSREG_CNTV_CTL_EL0, &val);
+    assert(b);
+    r = hv_vcpu_set_sys_reg(cpu->accel->fd, HV_SYS_REG_CNTV_CTL_EL0, val);
+    assert_hvf_ok(r);
+}
+
+static void hvf_sync_vtimer_post_exec(CPUState *cpu)
+{
+    hv_return_t r;
+    uint64_t val;
+    bool b;
+
+    r = hv_vcpu_get_sys_reg(cpu->accel->fd, HV_SYS_REG_CNTV_CVAL_EL0, &val);
+    assert_hvf_ok(r);
+    b = hvf_sysreg_write_cp(cpu, "VTimer", SYSREG_CNTV_CVAL_EL0, val);
+    assert(b);
+
+    r = hv_vcpu_get_sys_reg(cpu->accel->fd, HV_SYS_REG_CNTV_CTL_EL0, &val);
+    assert_hvf_ok(r);
+    b = hvf_sysreg_write_cp(cpu, "VTimer", SYSREG_CNTV_CTL_EL0, val);
+    assert(b);
+}
+
 void hvf_arch_cpu_synchronize_pre_exec(CPUState *cpu)
 {
+    hvf_sync_vtimer_pre_exec(cpu);
     flush_cpu_state(cpu);
 }
 
 void hvf_arch_cpu_synchronize_post_exec(CPUState *cpu)
 {
+    hvf_sync_vtimer_post_exec(cpu);
 }
 
 int hvf_arch_vcpu_exec(CPUState *cpu)
-- 
2.51.0



  parent reply	other threads:[~2025-11-03 10:21 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-03 10:10 [PATCH v4 00/23] target/arm/hvf: Consolidate Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 01/23] accel/hvf: Create hvf_protect_clean_range, hvf_unprotect_dirty_range Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 02/23] target/i386/hvf: Use host page alignment in ept_emulation_fault() Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 03/23] accel/hvf: Enforce host alignment in hv_vm_protect() Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 04/23] target/i386/hvf: Use hvf_unprotect_dirty_range Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 05/23] target/i386/hvf: Use address_space_translate in ept_emulation_fault Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 06/23] accel/hvf: Simplify hvf_log_* Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 07/23] accel/hvf: Move hvf_log_sync to hvf_log_clear Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 08/23] accel/hvf: Simplify hvf_set_phys_mem Philippe Mathieu-Daudé
2025-11-03 11:59   ` Akihiko Odaki
2025-11-03 10:10 ` [PATCH v4 09/23] accel/hvf: Drop hvf_slot and hvf_find_overlap_slot Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 10/23] accel/hvf: Remove mac_slots Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 11/23] target/arm/hvf: Implement dirty page tracking Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 12/23] accel/hvf: Skip WFI if CPU has work to do Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 13/23] accel/hvf: Implement WFI without using pselect() Philippe Mathieu-Daudé
2025-11-03 12:17   ` Akihiko Odaki
2025-11-03 10:10 ` [PATCH v4 14/23] accel/hvf: Have PSCI CPU_SUSPEND halt the vCPU Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 15/23] accel: Introduce AccelOpsClass::cpu_target_realize() hook Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 16/23] accel/hvf: Add hvf_arch_cpu_realize() stubs Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 17/23] target/arm: Create GTimers *after* features finalized / accel realized Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 18/23] target/arm/hvf: Really set Generic Timer counter frequency Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 19/23] target/arm: Only allow disabling NEON when using TCG Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 20/23] accel/hvf: Introduce hvf_arch_cpu_synchronize_[pre/post]exec() hooks Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 21/23] target/i386/hvf: Flush vCPU registers once before vcpu_exec() loop Philippe Mathieu-Daudé
2025-11-03 10:10 ` [PATCH v4 22/23] target/arm/hvf: " Philippe Mathieu-Daudé
2025-11-03 10:10 ` Philippe Mathieu-Daudé [this message]
2025-11-03 12:45   ` [PATCH v4 23/23] accel/hvf: Sync CNTV_CTL_EL0 & CNTV_CVAL_EL0 Akihiko Odaki

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