From: Luc Michel <luc.michel@amd.com>
To: <qemu-devel@nongnu.org>, <qemu-riscv@nongnu.org>
Cc: Luc Michel <luc.michel@amd.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>,
Weiwei Li <liwei1518@gmail.com>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
Francisco Iglesias <francisco.iglesias@amd.com>
Subject: [PATCH 2/9] hw/intc/riscv_aclint: fix coding style
Date: Fri, 7 Nov 2025 11:23:28 +0100 [thread overview]
Message-ID: <20251107102340.471141-3-luc.michel@amd.com> (raw)
In-Reply-To: <20251107102340.471141-1-luc.michel@amd.com>
Fix coding style in `riscv_aclint_mtimer_class_init' and
`riscv_aclint_swi_class_init' functions.
Signed-off-by: Luc Michel <luc.michel@amd.com>
---
hw/intc/riscv_aclint.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/intc/riscv_aclint.c b/hw/intc/riscv_aclint.c
index c6f13f647ec..5f5ffc61e80 100644
--- a/hw/intc/riscv_aclint.c
+++ b/hw/intc/riscv_aclint.c
@@ -342,13 +342,14 @@ static const VMStateDescription vmstate_riscv_mtimer = {
};
static void riscv_aclint_mtimer_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ ResettableClass *rc = RESETTABLE_CLASS(klass);
+
dc->realize = riscv_aclint_mtimer_realize;
device_class_set_props(dc, riscv_aclint_mtimer_properties);
- ResettableClass *rc = RESETTABLE_CLASS(klass);
rc->phases.enter = riscv_aclint_mtimer_reset_enter;
dc->vmsd = &vmstate_riscv_mtimer;
}
static const TypeInfo riscv_aclint_mtimer_info = {
@@ -528,13 +529,14 @@ static void riscv_aclint_swi_reset_enter(Object *obj, ResetType type)
}
static void riscv_aclint_swi_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ ResettableClass *rc = RESETTABLE_CLASS(klass);
+
dc->realize = riscv_aclint_swi_realize;
device_class_set_props(dc, riscv_aclint_swi_properties);
- ResettableClass *rc = RESETTABLE_CLASS(klass);
rc->phases.enter = riscv_aclint_swi_reset_enter;
}
static const TypeInfo riscv_aclint_swi_info = {
.name = TYPE_RISCV_ACLINT_SWI,
--
2.51.0
next prev parent reply other threads:[~2025-11-07 10:25 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-07 10:23 [PATCH 0/9] RISC-V CPU time source interface Luc Michel
2025-11-07 10:23 ` [PATCH 1/9] target/riscv: drop unused include directive in time_helper.c Luc Michel
2025-11-09 14:03 ` Philippe Mathieu-Daudé
2025-11-07 10:23 ` Luc Michel [this message]
2025-11-09 13:56 ` [PATCH 2/9] hw/intc/riscv_aclint: fix coding style Philippe Mathieu-Daudé
2025-11-07 10:23 ` [PATCH 3/9] hw/intc/riscv_aclint: rename cpu_riscv_read_rtc to riscv_aclint_mtimer_get_ticks Luc Michel
2025-11-09 13:56 ` Philippe Mathieu-Daudé
2025-11-07 10:23 ` [PATCH 4/9] target/riscv: add the RISCVCPUTimeSrcIf interface Luc Michel
2025-11-09 14:02 ` Philippe Mathieu-Daudé
2025-11-07 10:23 ` [PATCH 5/9] hw/intc/riscv_aclint: implement " Luc Michel
2025-11-09 14:01 ` Philippe Mathieu-Daudé
2025-11-07 10:23 ` [PATCH 6/9] target/riscv: replace env->rdtime_fn with a time source Luc Michel
2025-11-09 13:59 ` Philippe Mathieu-Daudé
2025-11-07 10:23 ` [PATCH 7/9] hw/intc/riscv_aclint: riscv_aclint_mtimer_get_ticks: get rid of void* argument Luc Michel
2025-11-09 13:59 ` Philippe Mathieu-Daudé
2025-11-07 10:23 ` [PATCH 8/9] target/riscv: RISCVCPUTimeSrcIf: add register_time_change_notifier Luc Michel
2025-11-20 17:20 ` Philippe Mathieu-Daudé
2025-11-21 8:24 ` Luc Michel
2025-11-07 10:23 ` [PATCH 9/9] hw/intc/riscv_aclint: implement the register_time_change_notifier method Luc Michel
2025-11-20 17:22 ` Philippe Mathieu-Daudé
2025-11-14 9:25 ` [PATCH 0/9] RISC-V CPU time source interface Luc Michel
2025-11-20 17:16 ` Philippe Mathieu-Daudé
2025-12-05 8:29 ` Luc Michel
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