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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-42b53f21948sm11798996f8f.43.2025.11.14.12.06.23 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 14 Nov 2025 12:06:24 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alexander Graf , qemu-arm@nongnu.org, Phil Dennis-Jordan , Paolo Bonzini , Richard Henderson , Peter Collingbourne , Cameron Esfahani , Mohamed Mediouni , Peter Maydell , Akihiko Odaki , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Roman Bolshakov , Mads Ynddal Subject: [PATCH v5 16/19] accel/hvf: Add hvf_arch_cpu_realize() stubs Date: Fri, 14 Nov 2025 21:04:18 +0100 Message-ID: <20251114200422.4280-17-philmd@linaro.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251114200422.4280-1-philmd@linaro.org> References: <20251114200422.4280-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Implement HVF AccelOpsClass::cpu_target_realize() hook as empty stubs. Target implementations will come separately. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Peter Maydell --- include/system/hvf_int.h | 2 ++ accel/hvf/hvf-accel-ops.c | 2 ++ target/arm/hvf/hvf.c | 5 +++++ target/i386/hvf/hvf.c | 5 +++++ 4 files changed, 14 insertions(+) diff --git a/include/system/hvf_int.h b/include/system/hvf_int.h index c8e407a1463..96790b49386 100644 --- a/include/system/hvf_int.h +++ b/include/system/hvf_int.h @@ -106,4 +106,6 @@ int hvf_update_guest_debug(CPUState *cpu); */ bool hvf_arch_supports_guest_debug(void); +bool hvf_arch_cpu_realize(CPUState *cpu, Error **errp); + #endif diff --git a/accel/hvf/hvf-accel-ops.c b/accel/hvf/hvf-accel-ops.c index 5922eb02e70..02c5d01670d 100644 --- a/accel/hvf/hvf-accel-ops.c +++ b/accel/hvf/hvf-accel-ops.c @@ -356,6 +356,8 @@ static void hvf_accel_ops_class_init(ObjectClass *oc, const void *data) { AccelOpsClass *ops = ACCEL_OPS_CLASS(oc); + ops->cpu_target_realize = hvf_arch_cpu_realize; + ops->create_vcpu_thread = hvf_start_vcpu_thread; ops->kick_vcpu_thread = hvf_kick_vcpu_thread; ops->handle_interrupt = generic_handle_interrupt; diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 59a2ef53629..8208d345daa 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -972,6 +972,11 @@ int hvf_arch_init_vcpu(CPUState *cpu) return 0; } +bool hvf_arch_cpu_realize(CPUState *cs, Error **errp) +{ + return true; +} + void hvf_kick_vcpu_thread(CPUState *cpu) { hv_return_t ret; diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index d0ee00425f0..1b189efb4c7 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -370,6 +370,11 @@ int hvf_arch_init_vcpu(CPUState *cpu) return 0; } +bool hvf_arch_cpu_realize(CPUState *cs, Error **errp) +{ + return true; +} + static void hvf_store_events(CPUState *cpu, uint32_t ins_len, uint64_t idtvec_info) { X86CPU *x86_cpu = X86_CPU(cpu); -- 2.51.0