From: Zhao Liu <zhao1.liu@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
Marcelo Tosatti <mtosatti@redhat.com>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org,
Chao Gao <chao.gao@intel.com>, Xin Li <xin@zytor.com>,
John Allen <john.allen@amd.com>, Babu Moger <babu.moger@amd.com>,
Mathias Krause <minipli@grsecurity.net>,
Dapeng Mi <dapeng1.mi@intel.com>, Zide Chen <zide.chen@intel.com>,
Xiaoyao Li <xiaoyao.li@intel.com>,
Chenyi Qiang <chenyi.qiang@intel.com>,
Farrah Chen <farrah.chen@intel.com>,
Zhao Liu <zhao1.liu@intel.com>
Subject: [PATCH v4 06/23] i386/kvm: Initialize x86_ext_save_areas[] based on KVM support
Date: Tue, 18 Nov 2025 11:42:14 +0800 [thread overview]
Message-ID: <20251118034231.704240-7-zhao1.liu@intel.com> (raw)
In-Reply-To: <20251118034231.704240-1-zhao1.liu@intel.com>
At present, in KVM, x86_ext_save_areas[] is initialized based on Host
CPUIDs.
Except AMX xstates, both user & supervisor xstates have their
information exposed in KVM_GET_SUPPORTED_CPUID. Therefore, their entries
in x86_ext_save_areas[] should be filled based on KVM support.
For AMX xstates (XFEATURE_MASK_XTILE_DATA and XFEATURE_MASK_XTILE_CFG),
KVM doesn't report their details before they (mainly
XSTATE_XTILE_DATA_MASK) get permission on host. But this happens within
the function kvm_request_xsave_components(), after the current
initialization. So still fill AMX entries with Host CPUIDs.
In addition, drop a check: "if (eax != 0)" when assert the assert the
size of xstate. In fact, this check is incorrect, since any valid
xstate should have non-zero size of xstate area.
Tested-by: Farrah Chen <farrah.chen@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
Changes Since v3:
- New commit.
---
target/i386/cpu.h | 3 +++
target/i386/kvm/kvm-cpu.c | 23 +++++++++++++++++------
2 files changed, 20 insertions(+), 6 deletions(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 3d74afc5a8e7..f065527757c4 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -609,6 +609,9 @@ typedef enum X86Seg {
#define XSTATE_DYNAMIC_MASK (XSTATE_XTILE_DATA_MASK)
+#define XSTATE_XTILE_MASK (XSTATE_XTILE_DATA_MASK | \
+ XSTATE_XTILE_CFG_MASK)
+
#define ESA_FEATURE_ALIGN64_BIT 1
#define ESA_FEATURE_XFD_BIT 2
diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c
index 9c25b5583955..2e2d47d2948a 100644
--- a/target/i386/kvm/kvm-cpu.c
+++ b/target/i386/kvm/kvm-cpu.c
@@ -136,7 +136,7 @@ static void kvm_cpu_max_instance_init(X86CPU *cpu)
static void kvm_cpu_xsave_init(void)
{
static bool first = true;
- uint32_t eax, ebx, ecx, edx;
+ uint32_t eax, ebx, ecx, unused;
int i;
if (!first) {
@@ -154,12 +154,23 @@ static void kvm_cpu_xsave_init(void)
if (!esa->size) {
continue;
}
- host_cpuid(0xd, i, &eax, &ebx, &ecx, &edx);
- if (eax != 0) {
- assert(esa->size == eax);
- esa->offset = ebx;
- esa->ecx = ecx;
+
+ /*
+ * AMX xstates are supported in KVM_GET_SUPPORTED_CPUID only when
+ * XSTATE_XTILE_DATA_MASK gets guest permission in
+ * kvm_request_xsave_components().
+ */
+ if (!((1 << i) & XSTATE_XTILE_MASK)) {
+ eax = kvm_arch_get_supported_cpuid(kvm_state, 0xd, i, R_EAX);
+ ebx = kvm_arch_get_supported_cpuid(kvm_state, 0xd, i, R_EBX);
+ ecx = kvm_arch_get_supported_cpuid(kvm_state, 0xd, i, R_ECX);
+ } else {
+ host_cpuid(0xd, i, &eax, &ebx, &ecx, &unused);
}
+
+ assert(esa->size == eax);
+ esa->offset = ebx;
+ esa->ecx = ecx;
}
}
--
2.34.1
next prev parent reply other threads:[~2025-11-18 3:21 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-18 3:42 [PATCH v4 00/23] i386: Support CET for KVM Zhao Liu
2025-11-18 3:42 ` [PATCH v4 01/23] i386/cpu: Clean up indent style of x86_ext_save_areas[] Zhao Liu
2025-11-18 3:42 ` [PATCH v4 02/23] i386/cpu: Clean up arch lbr xsave struct and comment Zhao Liu
2025-11-18 3:42 ` [PATCH v4 03/23] i386/cpu: Reorganize arch lbr structure definitions Zhao Liu
2025-11-18 3:42 ` [PATCH v4 04/23] i386/cpu: Make ExtSaveArea store an array of dependencies Zhao Liu
2025-11-18 3:42 ` [PATCH v4 05/23] i386/cpu: Add avx10 dependency for Opmask/ZMM_Hi256/Hi16_ZMM Zhao Liu
2025-11-18 3:42 ` Zhao Liu [this message]
2025-11-18 3:42 ` [PATCH v4 07/23] i386/cpu: Use x86_ext_save_areas[] for CPUID.0XD subleaves Zhao Liu
2025-11-18 3:42 ` [PATCH v4 08/23] i386/cpu: Reorganize dependency check for arch lbr state Zhao Liu
2025-11-18 3:42 ` [PATCH v4 09/23] i386/cpu: Drop pmu check in CPUID 0x1C encoding Zhao Liu
2025-11-18 3:42 ` [PATCH v4 10/23] i386/cpu: Fix supervisor xstate initialization Zhao Liu
2025-11-18 3:42 ` [PATCH v4 11/23] i386/cpu: Add missing migratable xsave features Zhao Liu
2025-11-18 3:42 ` [PATCH v4 12/23] i386/cpu: Enable xsave support for CET states Zhao Liu
2025-11-18 3:42 ` [PATCH v4 13/23] i386/cpu: Add CET support in CR4 Zhao Liu
2025-11-18 3:42 ` [PATCH v4 14/23] i386/cpu: Save/restore SSP0 MSR for FRED Zhao Liu
2025-11-18 3:42 ` [PATCH v4 15/23] i386/kvm: Add save/restore support for CET MSRs Zhao Liu
2025-11-18 3:42 ` [PATCH v4 16/23] i386/kvm: Add save/restore support for KVM_REG_GUEST_SSP Zhao Liu
2025-11-18 3:42 ` [PATCH v4 17/23] i386/cpu: Migrate MSR_IA32_PL0_SSP for FRED and CET-SHSTK Zhao Liu
2025-11-18 3:42 ` [PATCH v4 18/23] i386/machine: Add vmstate for cet-shstk and cet-ibt Zhao Liu
2025-11-18 3:42 ` [PATCH v4 19/23] i386/cpu: Mark cet-u & cet-s xstates as migratable Zhao Liu
2025-11-18 3:42 ` [PATCH v4 20/23] i386/cpu: Advertise CET related flags in feature words Zhao Liu
2025-11-18 3:42 ` [PATCH v4 21/23] i386/cpu: Enable cet-ss & cet-ibt for supported CPU models Zhao Liu
2025-11-18 3:42 ` [PATCH v4 22/23] i386/tdx: Fix missing spaces in tdx_xfam_deps[] Zhao Liu
2025-11-18 3:42 ` [PATCH v4 23/23] i386/tdx: Add CET SHSTK/IBT into the supported CPUID by XFAM Zhao Liu
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