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From: Zhao Liu <zhao1.liu@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
	Marcelo Tosatti <mtosatti@redhat.com>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org,
	Chao Gao <chao.gao@intel.com>, Xin Li <xin@zytor.com>,
	John Allen <john.allen@amd.com>, Babu Moger <babu.moger@amd.com>,
	Mathias Krause <minipli@grsecurity.net>,
	Dapeng Mi <dapeng1.mi@intel.com>, Zide Chen <zide.chen@intel.com>,
	Xiaoyao Li <xiaoyao.li@intel.com>,
	Chenyi Qiang <chenyi.qiang@intel.com>,
	Farrah Chen <farrah.chen@intel.com>,
	Zhao Liu <zhao1.liu@intel.com>
Subject: [PATCH v4 07/23] i386/cpu: Use x86_ext_save_areas[] for CPUID.0XD subleaves
Date: Tue, 18 Nov 2025 11:42:15 +0800	[thread overview]
Message-ID: <20251118034231.704240-8-zhao1.liu@intel.com> (raw)
In-Reply-To: <20251118034231.704240-1-zhao1.liu@intel.com>

The x86_ext_save_areas[] is expected to be well initialized by
accelerators and its xstate detail information cannot be changed by
user. So use x86_ext_save_areas[] to encode CPUID.0XD subleaves directly
without other hardcoding & masking.

And for arch LBR case, since its entry in x86_ext_save_areas[] has been
initialized based KVM support in kvm_cpu_xsave_init(), so use
x86_ext_save_areas[] for encoding.

Tested-by: Farrah Chen <farrah.chen@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
Changes Since v3:
 - New commit.
---
 target/i386/cpu.c | 19 ++++++++-----------
 1 file changed, 8 insertions(+), 11 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 70a282668f72..f3bf7f892214 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -8188,20 +8188,17 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
             }
         } else if (count == 0xf && cpu->enable_pmu
                    && (env->features[FEAT_7_0_EDX] & CPUID_7_0_EDX_ARCH_LBR)) {
-            x86_cpu_get_supported_cpuid(0xD, count, eax, ebx, ecx, edx);
+            const ExtSaveArea *esa = &x86_ext_save_areas[count];
+
+            *eax = esa->size;
+            *ebx = esa->offset;
+            *ecx = esa->ecx;
         } else if (count < ARRAY_SIZE(x86_ext_save_areas)) {
             const ExtSaveArea *esa = &x86_ext_save_areas[count];
 
-            if (x86_cpu_xsave_xcr0_components(cpu) & (1ULL << count)) {
-                *eax = esa->size;
-                *ebx = esa->offset;
-                *ecx = esa->ecx &
-                       (ESA_FEATURE_ALIGN64_MASK | ESA_FEATURE_XFD_MASK);
-            } else if (x86_cpu_xsave_xss_components(cpu) & (1ULL << count)) {
-                *eax = esa->size;
-                *ebx = 0;
-                *ecx = 1;
-            }
+            *eax = esa->size;
+            *ebx = esa->offset;
+            *ecx = esa->ecx;
         }
         break;
     }
-- 
2.34.1



  parent reply	other threads:[~2025-11-18  3:24 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-18  3:42 [PATCH v4 00/23] i386: Support CET for KVM Zhao Liu
2025-11-18  3:42 ` [PATCH v4 01/23] i386/cpu: Clean up indent style of x86_ext_save_areas[] Zhao Liu
2025-11-18  3:42 ` [PATCH v4 02/23] i386/cpu: Clean up arch lbr xsave struct and comment Zhao Liu
2025-11-18  3:42 ` [PATCH v4 03/23] i386/cpu: Reorganize arch lbr structure definitions Zhao Liu
2025-11-18  3:42 ` [PATCH v4 04/23] i386/cpu: Make ExtSaveArea store an array of dependencies Zhao Liu
2025-11-18  3:42 ` [PATCH v4 05/23] i386/cpu: Add avx10 dependency for Opmask/ZMM_Hi256/Hi16_ZMM Zhao Liu
2025-11-18  3:42 ` [PATCH v4 06/23] i386/kvm: Initialize x86_ext_save_areas[] based on KVM support Zhao Liu
2025-11-18  3:42 ` Zhao Liu [this message]
2025-11-18  3:42 ` [PATCH v4 08/23] i386/cpu: Reorganize dependency check for arch lbr state Zhao Liu
2025-11-18  3:42 ` [PATCH v4 09/23] i386/cpu: Drop pmu check in CPUID 0x1C encoding Zhao Liu
2025-11-18  3:42 ` [PATCH v4 10/23] i386/cpu: Fix supervisor xstate initialization Zhao Liu
2025-11-18  3:42 ` [PATCH v4 11/23] i386/cpu: Add missing migratable xsave features Zhao Liu
2025-11-18  3:42 ` [PATCH v4 12/23] i386/cpu: Enable xsave support for CET states Zhao Liu
2025-11-18  3:42 ` [PATCH v4 13/23] i386/cpu: Add CET support in CR4 Zhao Liu
2025-11-18  3:42 ` [PATCH v4 14/23] i386/cpu: Save/restore SSP0 MSR for FRED Zhao Liu
2025-11-18  3:42 ` [PATCH v4 15/23] i386/kvm: Add save/restore support for CET MSRs Zhao Liu
2025-11-18  3:42 ` [PATCH v4 16/23] i386/kvm: Add save/restore support for KVM_REG_GUEST_SSP Zhao Liu
2025-11-18  3:42 ` [PATCH v4 17/23] i386/cpu: Migrate MSR_IA32_PL0_SSP for FRED and CET-SHSTK Zhao Liu
2025-11-18  3:42 ` [PATCH v4 18/23] i386/machine: Add vmstate for cet-shstk and cet-ibt Zhao Liu
2025-11-18  3:42 ` [PATCH v4 19/23] i386/cpu: Mark cet-u & cet-s xstates as migratable Zhao Liu
2025-11-18  3:42 ` [PATCH v4 20/23] i386/cpu: Advertise CET related flags in feature words Zhao Liu
2025-11-18  3:42 ` [PATCH v4 21/23] i386/cpu: Enable cet-ss & cet-ibt for supported CPU models Zhao Liu
2025-11-18  3:42 ` [PATCH v4 22/23] i386/tdx: Fix missing spaces in tdx_xfam_deps[] Zhao Liu
2025-11-18  3:42 ` [PATCH v4 23/23] i386/tdx: Add CET SHSTK/IBT into the supported CPUID by XFAM Zhao Liu

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