From: Drew Fustini <fustini@kernel.org>
To: qemu-devel@nongnu.org
Cc: "Palmer Dabbelt" <palmer@dabbelt.com>,
"Alistair Francis" <Alistair.Francis@wdc.com>,
"Weiwei Li" <liwei1518@gmail.com>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
qemu-riscv@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
"Nicolas Pitre" <npitre@baylibre.com>,
"Kornel Dulęba" <mindal@semihalf.com>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Atish Patra" <atish.patra@linux.dev>,
"Vasudevan Srinivasan" <vasu@rivosinc.com>,
"Radim Krčmář" <rkrcmar@ventanamicro.com>,
"yunhui cui" <cuiyunhui@bytedance.com>,
"Chen Pei" <cp0613@linux.alibaba.com>,
guo.wenjia23@zte.com.cn, liu.qingtao2@zte.com.cn,
"Drew Fustini" <fustini@kernel.org>
Subject: [PATCH 7/7] hw/riscv: add CBQRI controllers to virt machine
Date: Wed, 19 Nov 2025 16:42:23 -0800 [thread overview]
Message-ID: <20251119-riscv-ssqosid-cbqri-v1-7-3392fc760e48@kernel.org> (raw)
In-Reply-To: <20251119-riscv-ssqosid-cbqri-v1-0-3392fc760e48@kernel.org>
From: Nicolas Pitre <npitre@baylibre.com>
Add CBQRI controllers to the RISC-V virt machine. The device properties
can be fully configured from the command line:
$ qemu-system-riscv64 -M virt ... \
-device riscv.cbqri.capacity,mmio_base=0x04828000[,...]
-device riscv.cbqri.bandwidth,mmio_base=0x04829000[,...]
The mmio_base option is mandatory, the others are optional.
Many -device arguments as wanted can be provided as long as their
mmio regions don't conflict.
To see all possible options:
$ qemu-system-riscv64 -device riscv.cbqri.capacity,help
riscv.cbqri.capacity options:
alloc_op_config_limit=<bool> - (default: true)
alloc_op_flush_rcid=<bool> - (default: true)
alloc_op_read_limit=<bool> - (default: true)
at_code=<bool> - (default: true)
at_data=<bool> - (default: true)
max_mcids=<uint16> - (default: 256)
max_rcids=<uint16> - (default: 64)
mmio_base=<uint64> - (default: 0)
mon_evt_id_none=<bool> - (default: true)
mon_evt_id_occupancy=<bool> - (default: true)
mon_op_config_event=<bool> - (default: true)
mon_op_read_counter=<bool> - (default: true)
ncblks=<uint16> - (default: 16)
target=<str>
$ qemu-system-riscv64 -device riscv.cbqri.bandwidth,help
riscv.cbqri.bandwidth options:
alloc_op_config_limit=<bool> - (default: true)
alloc_op_read_limit=<bool> - (default: true)
at_code=<bool> - (default: true)
at_data=<bool> - (default: true)
max_mcids=<uint16> - (default: 256)
max_rcids=<uint16> - (default: 64)
mmio_base=<uint64> - (default: 0)
mon_evt_id_none=<bool> - (default: true)
mon_evt_id_rdonly_count=<bool> - (default: true)
mon_evt_id_rdwr_count=<bool> - (default: true)
mon_evt_id_wronly_count=<bool> - (default: true)
mon_op_config_event=<bool> - (default: true)
mon_op_read_counter=<bool> - (default: true)
nbwblks=<uint16> - (default: 1024)
target=<str>
Boolean options correspond to hardware capabilities that can be disabled
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Signed-off-by: Drew Fustini <fustini@kernel.org>
---
hw/riscv/virt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 17909206c7ef..498f606d33b1 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -55,6 +55,7 @@
#include "hw/pci-host/gpex.h"
#include "hw/display/ramfb.h"
#include "hw/acpi/aml-build.h"
+#include "hw/riscv/cbqri.h"
#include "qapi/qapi-visit-common.h"
#include "hw/virtio/virtio-iommu.h"
#include "hw/uefi/var-service-api.h"
@@ -1941,6 +1942,8 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)
#ifdef CONFIG_TPM
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS);
#endif
+ machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RISCV_CBQRI_BC);
+ machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RISCV_CBQRI_CC);
object_class_property_add_bool(oc, "aclint", virt_get_aclint,
virt_set_aclint);
--
2.43.0
next prev parent reply other threads:[~2025-11-20 1:05 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-20 0:42 [PATCH 0/7] riscv: implement Ssqosid extension and CBQRI controllers Drew Fustini
2025-11-20 0:42 ` [PATCH 1/7] riscv: implement Ssqosid extension and srmcfg CSR Drew Fustini
2025-11-20 11:30 ` Daniel Henrique Barboza
2025-11-20 21:34 ` Drew Fustini
2025-11-20 16:07 ` Radim Krčmář
2025-11-20 20:46 ` Drew Fustini
2025-11-20 0:42 ` [PATCH 2/7] hw/riscv: define capabilities of CBQRI controllers Drew Fustini
2025-11-20 11:59 ` Daniel Henrique Barboza
2025-11-20 0:42 ` [PATCH 3/7] hw/riscv: implement CBQRI capacity controller Drew Fustini
2025-11-20 11:47 ` Daniel Henrique Barboza
2025-11-21 18:57 ` Drew Fustini
2025-11-20 19:25 ` Radim Krčmář
2025-11-21 19:50 ` Drew Fustini
2025-11-20 0:42 ` [PATCH 4/7] hw/riscv: implement CBQRI bandwidth controller Drew Fustini
2025-11-20 11:51 ` Daniel Henrique Barboza
2025-11-20 0:42 ` [PATCH 5/7] hw/riscv: Kconfig: add CBQRI options Drew Fustini
2025-11-20 0:42 ` [PATCH 6/7] hw/riscv: meson: add CBQRI controllers to the build Drew Fustini
2025-11-20 12:01 ` Daniel Henrique Barboza
2025-11-20 20:56 ` Drew Fustini
2025-11-20 0:42 ` Drew Fustini [this message]
2025-11-20 12:01 ` [PATCH 7/7] hw/riscv: add CBQRI controllers to virt machine Daniel Henrique Barboza
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20251119-riscv-ssqosid-cbqri-v1-7-3392fc760e48@kernel.org \
--to=fustini@kernel.org \
--cc=Alistair.Francis@wdc.com \
--cc=atish.patra@linux.dev \
--cc=atishp@rivosinc.com \
--cc=cp0613@linux.alibaba.com \
--cc=cuiyunhui@bytedance.com \
--cc=dbarboza@ventanamicro.com \
--cc=guo.wenjia23@zte.com.cn \
--cc=liu.qingtao2@zte.com.cn \
--cc=liwei1518@gmail.com \
--cc=mindal@semihalf.com \
--cc=npitre@baylibre.com \
--cc=palmer@dabbelt.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=rkrcmar@ventanamicro.com \
--cc=vasu@rivosinc.com \
--cc=zhiwei_liu@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).