qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Shameer Kolothum <skolothumtho@nvidia.com>
To: <qemu-arm@nongnu.org>, <qemu-devel@nongnu.org>
Cc: <eric.auger@redhat.com>, <peter.maydell@linaro.org>,
	<jgg@nvidia.com>, <nicolinc@nvidia.com>, <ddutile@redhat.com>,
	<berrange@redhat.com>, <nathanc@nvidia.com>, <mochs@nvidia.com>,
	<smostafa@google.com>, <wangzhou1@hisilicon.com>,
	<jiangkunkun@huawei.com>, <jonathan.cameron@huawei.com>,
	<zhangfei.gao@linaro.org>, <zhenzhong.duan@intel.com>,
	<yi.l.liu@intel.com>, <kjaju@nvidia.com>,
	"Michael S . Tsirkin" <mst@redhat.com>
Subject: [PATCH v6 07/33] hw/pci/pci: Move pci_init_bus_master() after adding device to bus
Date: Thu, 20 Nov 2025 13:21:47 +0000	[thread overview]
Message-ID: <20251120132213.56581-8-skolothumtho@nvidia.com> (raw)
In-Reply-To: <20251120132213.56581-1-skolothumtho@nvidia.com>

During PCI hotplug, in do_pci_register_device(), pci_init_bus_master()
is called before storing the pci_dev pointer in bus->devices[devfn].

This causes a problem if pci_init_bus_master() (via its
get_address_space() callback) attempts to retrieve the device using
pci_find_device(), since the PCI device is not yet visible on the bus.

Fix this by moving the pci_init_bus_master() call to after the device
has been added to bus->devices[devfn].

This prepares for a subsequent patch where the accel SMMUv3
get_address_space() callback retrieves the pci_dev to identify the
attached device type.

No functional change intended.

Cc: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com>
---
 hw/pci/pci.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 8b62044a8e..af32ab4adb 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -1381,9 +1381,6 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev,
     pci_dev->bus_master_as.max_bounce_buffer_size =
         pci_dev->max_bounce_buffer_size;
 
-    if (phase_check(PHASE_MACHINE_READY)) {
-        pci_init_bus_master(pci_dev);
-    }
     pci_dev->irq_state = 0;
     pci_config_alloc(pci_dev);
 
@@ -1427,6 +1424,9 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev,
     pci_dev->config_write = config_write;
     bus->devices[devfn] = pci_dev;
     pci_dev->version_id = 2; /* Current pci device vmstate version */
+    if (phase_check(PHASE_MACHINE_READY)) {
+        pci_init_bus_master(pci_dev);
+    }
     return pci_dev;
 }
 
-- 
2.43.0



  parent reply	other threads:[~2025-11-20 13:24 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-20 13:21 [PATCH v6 00/33] hw/arm/virt: Add support for user-creatable accelerated SMMUv3 Shameer Kolothum
2025-11-20 13:21 ` [PATCH v6 01/33] backends/iommufd: Introduce iommufd_backend_alloc_viommu Shameer Kolothum
2025-11-20 13:21 ` [PATCH v6 02/33] backends/iommufd: Introduce iommufd_backend_alloc_vdev Shameer Kolothum
2025-11-20 13:21 ` [PATCH v6 03/33] hw/arm/smmu-common: Factor out common helper functions and export Shameer Kolothum
2025-11-20 13:21 ` [PATCH v6 04/33] hw/arm/smmu-common: Make iommu ops part of SMMUState Shameer Kolothum
2025-11-20 13:21 ` [PATCH v6 05/33] hw/arm/smmuv3-accel: Introduce smmuv3 accel device Shameer Kolothum
2025-11-20 13:21 ` [PATCH v6 06/33] hw/arm/smmuv3-accel: Initialize shared system address space Shameer Kolothum
2025-12-08 17:05   ` Eric Auger
2025-11-20 13:21 ` Shameer Kolothum [this message]
2025-11-20 20:44   ` [PATCH v6 07/33] hw/pci/pci: Move pci_init_bus_master() after adding device to bus Nicolin Chen
2025-11-20 13:21 ` [PATCH v6 08/33] hw/pci/pci: Add optional supports_address_space() callback Shameer Kolothum
2025-11-20 20:51   ` Nicolin Chen
2025-11-21 10:38     ` Shameer Kolothum
2025-11-21 17:28       ` Nicolin Chen
2025-11-21 17:32         ` Shameer Kolothum
2025-11-20 13:21 ` [PATCH v6 09/33] hw/pci-bridge/pci_expander_bridge: Move TYPE_PXB_PCIE_DEV to header Shameer Kolothum
2025-11-20 20:52   ` Nicolin Chen
2025-11-20 13:21 ` [PATCH v6 10/33] hw/arm/smmuv3-accel: Restrict accelerated SMMUv3 to vfio-pci endpoints with iommufd Shameer Kolothum
2025-11-20 13:21 ` [PATCH v6 11/33] hw/arm/smmuv3: Implement get_viommu_cap() callback Shameer Kolothum
2025-11-20 13:21 ` [PATCH v6 12/33] hw/arm/smmuv3-accel: Add set/unset_iommu_device callback Shameer Kolothum
2025-12-09  7:57   ` Eric Auger
2025-11-20 13:21 ` [PATCH v6 13/33] hw/arm/smmuv3: propagate smmuv3_cmdq_consume() errors to caller Shameer Kolothum
2025-11-20 20:59   ` Nicolin Chen
2025-12-04 16:28   ` Eric Auger
2025-11-20 13:21 ` [PATCH v6 14/33] hw/arm/smmuv3-accel: Add nested vSTE install/uninstall support Shameer Kolothum
2025-12-09  8:14   ` Eric Auger
2025-11-20 13:21 ` [PATCH v6 15/33] hw/arm/smmuv3-accel: Install SMMUv3 GBPA based hwpt Shameer Kolothum
2025-11-20 21:03   ` Nicolin Chen
2025-11-20 13:21 ` [PATCH v6 16/33] hw/pci/pci: Introduce a callback to retrieve the MSI doorbell GPA directly Shameer Kolothum
2025-11-20 21:05   ` Nicolin Chen
2025-12-04 16:38   ` Eric Auger
2025-12-04 18:57     ` Shameer Kolothum
2025-12-08 17:03       ` Eric Auger
2025-11-20 13:21 ` [PATCH v6 17/33] hw/arm/smmuv3: Add support for providing a direct MSI doorbell GPA Shameer Kolothum
2025-11-20 21:21   ` Nicolin Chen
2025-11-21  9:57     ` Shameer Kolothum
2025-11-21 17:56       ` Nicolin Chen
2025-11-24  8:05         ` Shameer Kolothum
2025-11-24 18:34           ` Nicolin Chen
2025-11-24 19:01             ` Shameer Kolothum
2025-11-24 20:08               ` Nicolin Chen
2025-11-20 13:21 ` [PATCH v6 18/33] hw/arm/smmuv3-accel: Add support to issue invalidation cmd to host Shameer Kolothum
2025-11-20 13:21 ` [PATCH v6 19/33] hw/arm/smmuv3: Initialize ID registers early during realize() Shameer Kolothum
2025-11-20 13:22 ` [PATCH v6 20/33] hw/arm/smmuv3-accel: Get host SMMUv3 hw info and validate Shameer Kolothum
2025-11-20 21:27   ` Nicolin Chen
2025-11-20 21:30     ` Nicolin Chen
2025-11-20 13:22 ` [PATCH v6 21/33] hw/pci-host/gpex: Allow to generate preserve boot config DSM #5 Shameer Kolothum
2025-11-20 13:22 ` [PATCH v6 22/33] hw/arm/virt: Set PCI preserve_config for accel SMMUv3 Shameer Kolothum
2025-11-20 13:22 ` [PATCH v6 23/33] tests/qtest/bios-tables-test: Prepare for IORT revison upgrade Shameer Kolothum
2025-11-20 13:22 ` [PATCH v6 24/33] hw/arm/virt-acpi-build: Add IORT RMR regions to handle MSI nested binding Shameer Kolothum
2025-11-20 13:22 ` [PATCH v6 25/33] tests/qtest/bios-tables-test: Update IORT blobs after revision upgrade Shameer Kolothum
2025-11-20 13:22 ` [PATCH v6 26/33] hw/arm/smmuv3: Add accel property for SMMUv3 device Shameer Kolothum
2025-11-20 13:22 ` [PATCH v6 27/33] hw/arm/smmuv3-accel: Add a property to specify RIL support Shameer Kolothum
2025-11-20 21:34   ` Nicolin Chen via
2025-11-21 10:04     ` Shameer Kolothum
2025-11-20 13:22 ` [PATCH v6 28/33] hw/arm/smmuv3-accel: Add support for ATS Shameer Kolothum
2025-11-20 21:40   ` Nicolin Chen
2025-11-24 12:00   ` Zhangfei Gao
2025-11-24 12:48     ` Shameer Kolothum
2025-12-08 17:36   ` Eric Auger
2025-11-20 13:22 ` [PATCH v6 29/33] hw/arm/smmuv3-accel: Add property to specify OAS bits Shameer Kolothum
2025-11-20 21:47   ` Nicolin Chen
2025-12-08 17:17     ` Eric Auger
2025-11-20 13:22 ` [PATCH v6 30/33] backends/iommufd: Retrieve PASID width from iommufd_backend_get_device_info() Shameer Kolothum
2025-11-20 21:50   ` Nicolin Chen
2025-11-20 13:22 ` [PATCH v6 31/33] Extend get_cap() callback to support PASID Shameer Kolothum
2025-11-20 21:56   ` Nicolin Chen
2025-12-08 17:20   ` Eric Auger
2025-11-20 13:22 ` [PATCH v6 32/33] vfio: Synthesize vPASID capability to VM Shameer Kolothum
2025-11-20 21:59   ` Nicolin Chen
2025-12-09  9:51   ` Eric Auger
2025-12-09 11:17     ` Yi Liu
2025-11-20 13:22 ` [PATCH v6 33/33] hw/arm/smmuv3-accel: Add support for PASID enable Shameer Kolothum
2025-11-20 22:09   ` Nicolin Chen
2025-11-21 10:22     ` Shameer Kolothum
2025-11-21 17:50       ` Nicolin Chen
2025-11-21 18:36         ` Nicolin Chen
2025-11-21 18:44         ` Jason Gunthorpe
2025-11-24  8:17         ` Shameer Kolothum
2025-11-20 17:06 ` [PATCH v6 00/33] hw/arm/virt: Add support for user-creatable accelerated SMMUv3 Nicolin Chen
2025-11-24 12:09   ` Zhangfei Gao
2025-12-08 10:08 ` Duan, Zhenzhong
2025-12-08 11:15   ` Shameer Kolothum
2025-12-09  2:30     ` Duan, Zhenzhong
2025-12-09  3:33       ` Yi Liu
2025-12-09 10:31 ` Cédric Le Goater
2025-12-10 15:07   ` Shameer Kolothum
2025-12-10 16:07     ` Cédric Le Goater
2025-12-10 16:18       ` Eric Auger

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20251120132213.56581-8-skolothumtho@nvidia.com \
    --to=skolothumtho@nvidia.com \
    --cc=berrange@redhat.com \
    --cc=ddutile@redhat.com \
    --cc=eric.auger@redhat.com \
    --cc=jgg@nvidia.com \
    --cc=jiangkunkun@huawei.com \
    --cc=jonathan.cameron@huawei.com \
    --cc=kjaju@nvidia.com \
    --cc=mochs@nvidia.com \
    --cc=mst@redhat.com \
    --cc=nathanc@nvidia.com \
    --cc=nicolinc@nvidia.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=smostafa@google.com \
    --cc=wangzhou1@hisilicon.com \
    --cc=yi.l.liu@intel.com \
    --cc=zhangfei.gao@linaro.org \
    --cc=zhenzhong.duan@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).