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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>,
	Anton Johansson <anjo@rev.ng>
Subject: [RFC-PATCH-for-11.0 v3 11/21] target/tricore: Use little-endian variant of cpu_ld/st_data*()
Date: Fri, 21 Nov 2025 14:44:53 +0100	[thread overview]
Message-ID: <20251121134503.30914-12-philmd@linaro.org> (raw)
In-Reply-To: <20251121134503.30914-1-philmd@linaro.org>

We only build the TriCore target using little endianness order,
therefore the cpu_ld/st_data*() definitions expand to the little
endian declarations. Use the explicit little-endian variants.

Mechanical change running:

  $ tgt=tricore; \
    end=le; \
    for op in data mmuidx_ra; do \
      for ac in uw sw l q; do \
        sed -i -e "s/cpu_ld${ac}_${op}/cpu_ld${ac}_${end}_${op}/" \
                  $(git grep -l cpu_ target/${tgt}/); \
      done;
      for ac in w l q; do \
        sed -i -e "s/cpu_st${ac}_${op}/cpu_st${ac}_${end}_${op}/" \
                  $(git grep -l cpu_ target/${tgt}/); \
      done;
    done

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/tricore/op_helper.c | 152 ++++++++++++++++++-------------------
 1 file changed, 76 insertions(+), 76 deletions(-)

diff --git a/target/tricore/op_helper.c b/target/tricore/op_helper.c
index 2c8281a67e0..88b50bc1a9b 100644
--- a/target/tricore/op_helper.c
+++ b/target/tricore/op_helper.c
@@ -2451,84 +2451,84 @@ static bool cdc_zero(uint32_t *psw)
 
 static void save_context_upper(CPUTriCoreState *env, uint32_t ea)
 {
-    cpu_stl_data(env, ea, env->PCXI);
-    cpu_stl_data(env, ea+4, psw_read(env));
-    cpu_stl_data(env, ea+8, env->gpr_a[10]);
-    cpu_stl_data(env, ea+12, env->gpr_a[11]);
-    cpu_stl_data(env, ea+16, env->gpr_d[8]);
-    cpu_stl_data(env, ea+20, env->gpr_d[9]);
-    cpu_stl_data(env, ea+24, env->gpr_d[10]);
-    cpu_stl_data(env, ea+28, env->gpr_d[11]);
-    cpu_stl_data(env, ea+32, env->gpr_a[12]);
-    cpu_stl_data(env, ea+36, env->gpr_a[13]);
-    cpu_stl_data(env, ea+40, env->gpr_a[14]);
-    cpu_stl_data(env, ea+44, env->gpr_a[15]);
-    cpu_stl_data(env, ea+48, env->gpr_d[12]);
-    cpu_stl_data(env, ea+52, env->gpr_d[13]);
-    cpu_stl_data(env, ea+56, env->gpr_d[14]);
-    cpu_stl_data(env, ea+60, env->gpr_d[15]);
+    cpu_stl_le_data(env, ea, env->PCXI);
+    cpu_stl_le_data(env, ea+4, psw_read(env));
+    cpu_stl_le_data(env, ea+8, env->gpr_a[10]);
+    cpu_stl_le_data(env, ea+12, env->gpr_a[11]);
+    cpu_stl_le_data(env, ea+16, env->gpr_d[8]);
+    cpu_stl_le_data(env, ea+20, env->gpr_d[9]);
+    cpu_stl_le_data(env, ea+24, env->gpr_d[10]);
+    cpu_stl_le_data(env, ea+28, env->gpr_d[11]);
+    cpu_stl_le_data(env, ea+32, env->gpr_a[12]);
+    cpu_stl_le_data(env, ea+36, env->gpr_a[13]);
+    cpu_stl_le_data(env, ea+40, env->gpr_a[14]);
+    cpu_stl_le_data(env, ea+44, env->gpr_a[15]);
+    cpu_stl_le_data(env, ea+48, env->gpr_d[12]);
+    cpu_stl_le_data(env, ea+52, env->gpr_d[13]);
+    cpu_stl_le_data(env, ea+56, env->gpr_d[14]);
+    cpu_stl_le_data(env, ea+60, env->gpr_d[15]);
 }
 
 static void save_context_lower(CPUTriCoreState *env, uint32_t ea)
 {
-    cpu_stl_data(env, ea, env->PCXI);
-    cpu_stl_data(env, ea+4, env->gpr_a[11]);
-    cpu_stl_data(env, ea+8, env->gpr_a[2]);
-    cpu_stl_data(env, ea+12, env->gpr_a[3]);
-    cpu_stl_data(env, ea+16, env->gpr_d[0]);
-    cpu_stl_data(env, ea+20, env->gpr_d[1]);
-    cpu_stl_data(env, ea+24, env->gpr_d[2]);
-    cpu_stl_data(env, ea+28, env->gpr_d[3]);
-    cpu_stl_data(env, ea+32, env->gpr_a[4]);
-    cpu_stl_data(env, ea+36, env->gpr_a[5]);
-    cpu_stl_data(env, ea+40, env->gpr_a[6]);
-    cpu_stl_data(env, ea+44, env->gpr_a[7]);
-    cpu_stl_data(env, ea+48, env->gpr_d[4]);
-    cpu_stl_data(env, ea+52, env->gpr_d[5]);
-    cpu_stl_data(env, ea+56, env->gpr_d[6]);
-    cpu_stl_data(env, ea+60, env->gpr_d[7]);
+    cpu_stl_le_data(env, ea, env->PCXI);
+    cpu_stl_le_data(env, ea+4, env->gpr_a[11]);
+    cpu_stl_le_data(env, ea+8, env->gpr_a[2]);
+    cpu_stl_le_data(env, ea+12, env->gpr_a[3]);
+    cpu_stl_le_data(env, ea+16, env->gpr_d[0]);
+    cpu_stl_le_data(env, ea+20, env->gpr_d[1]);
+    cpu_stl_le_data(env, ea+24, env->gpr_d[2]);
+    cpu_stl_le_data(env, ea+28, env->gpr_d[3]);
+    cpu_stl_le_data(env, ea+32, env->gpr_a[4]);
+    cpu_stl_le_data(env, ea+36, env->gpr_a[5]);
+    cpu_stl_le_data(env, ea+40, env->gpr_a[6]);
+    cpu_stl_le_data(env, ea+44, env->gpr_a[7]);
+    cpu_stl_le_data(env, ea+48, env->gpr_d[4]);
+    cpu_stl_le_data(env, ea+52, env->gpr_d[5]);
+    cpu_stl_le_data(env, ea+56, env->gpr_d[6]);
+    cpu_stl_le_data(env, ea+60, env->gpr_d[7]);
 }
 
 static void restore_context_upper(CPUTriCoreState *env, uint32_t ea,
                                   uint32_t *new_PCXI, uint32_t *new_PSW)
 {
-    *new_PCXI = cpu_ldl_data(env, ea);
-    *new_PSW = cpu_ldl_data(env, ea+4);
-    env->gpr_a[10] = cpu_ldl_data(env, ea+8);
-    env->gpr_a[11] = cpu_ldl_data(env, ea+12);
-    env->gpr_d[8]  = cpu_ldl_data(env, ea+16);
-    env->gpr_d[9]  = cpu_ldl_data(env, ea+20);
-    env->gpr_d[10] = cpu_ldl_data(env, ea+24);
-    env->gpr_d[11] = cpu_ldl_data(env, ea+28);
-    env->gpr_a[12] = cpu_ldl_data(env, ea+32);
-    env->gpr_a[13] = cpu_ldl_data(env, ea+36);
-    env->gpr_a[14] = cpu_ldl_data(env, ea+40);
-    env->gpr_a[15] = cpu_ldl_data(env, ea+44);
-    env->gpr_d[12] = cpu_ldl_data(env, ea+48);
-    env->gpr_d[13] = cpu_ldl_data(env, ea+52);
-    env->gpr_d[14] = cpu_ldl_data(env, ea+56);
-    env->gpr_d[15] = cpu_ldl_data(env, ea+60);
+    *new_PCXI = cpu_ldl_le_data(env, ea);
+    *new_PSW = cpu_ldl_le_data(env, ea+4);
+    env->gpr_a[10] = cpu_ldl_le_data(env, ea+8);
+    env->gpr_a[11] = cpu_ldl_le_data(env, ea+12);
+    env->gpr_d[8]  = cpu_ldl_le_data(env, ea+16);
+    env->gpr_d[9]  = cpu_ldl_le_data(env, ea+20);
+    env->gpr_d[10] = cpu_ldl_le_data(env, ea+24);
+    env->gpr_d[11] = cpu_ldl_le_data(env, ea+28);
+    env->gpr_a[12] = cpu_ldl_le_data(env, ea+32);
+    env->gpr_a[13] = cpu_ldl_le_data(env, ea+36);
+    env->gpr_a[14] = cpu_ldl_le_data(env, ea+40);
+    env->gpr_a[15] = cpu_ldl_le_data(env, ea+44);
+    env->gpr_d[12] = cpu_ldl_le_data(env, ea+48);
+    env->gpr_d[13] = cpu_ldl_le_data(env, ea+52);
+    env->gpr_d[14] = cpu_ldl_le_data(env, ea+56);
+    env->gpr_d[15] = cpu_ldl_le_data(env, ea+60);
 }
 
 static void restore_context_lower(CPUTriCoreState *env, uint32_t ea,
                                   uint32_t *ra, uint32_t *pcxi)
 {
-    *pcxi = cpu_ldl_data(env, ea);
-    *ra = cpu_ldl_data(env, ea+4);
-    env->gpr_a[2] = cpu_ldl_data(env, ea+8);
-    env->gpr_a[3] = cpu_ldl_data(env, ea+12);
-    env->gpr_d[0] = cpu_ldl_data(env, ea+16);
-    env->gpr_d[1] = cpu_ldl_data(env, ea+20);
-    env->gpr_d[2] = cpu_ldl_data(env, ea+24);
-    env->gpr_d[3] = cpu_ldl_data(env, ea+28);
-    env->gpr_a[4] = cpu_ldl_data(env, ea+32);
-    env->gpr_a[5] = cpu_ldl_data(env, ea+36);
-    env->gpr_a[6] = cpu_ldl_data(env, ea+40);
-    env->gpr_a[7] = cpu_ldl_data(env, ea+44);
-    env->gpr_d[4] = cpu_ldl_data(env, ea+48);
-    env->gpr_d[5] = cpu_ldl_data(env, ea+52);
-    env->gpr_d[6] = cpu_ldl_data(env, ea+56);
-    env->gpr_d[7] = cpu_ldl_data(env, ea+60);
+    *pcxi = cpu_ldl_le_data(env, ea);
+    *ra = cpu_ldl_le_data(env, ea+4);
+    env->gpr_a[2] = cpu_ldl_le_data(env, ea+8);
+    env->gpr_a[3] = cpu_ldl_le_data(env, ea+12);
+    env->gpr_d[0] = cpu_ldl_le_data(env, ea+16);
+    env->gpr_d[1] = cpu_ldl_le_data(env, ea+20);
+    env->gpr_d[2] = cpu_ldl_le_data(env, ea+24);
+    env->gpr_d[3] = cpu_ldl_le_data(env, ea+28);
+    env->gpr_a[4] = cpu_ldl_le_data(env, ea+32);
+    env->gpr_a[5] = cpu_ldl_le_data(env, ea+36);
+    env->gpr_a[6] = cpu_ldl_le_data(env, ea+40);
+    env->gpr_a[7] = cpu_ldl_le_data(env, ea+44);
+    env->gpr_d[4] = cpu_ldl_le_data(env, ea+48);
+    env->gpr_d[5] = cpu_ldl_le_data(env, ea+52);
+    env->gpr_d[6] = cpu_ldl_le_data(env, ea+56);
+    env->gpr_d[7] = cpu_ldl_le_data(env, ea+60);
 }
 
 void helper_call(CPUTriCoreState *env, uint32_t next_pc)
@@ -2566,7 +2566,7 @@ void helper_call(CPUTriCoreState *env, uint32_t next_pc)
     ea = ((env->FCX & MASK_FCX_FCXS) << 12) +
          ((env->FCX & MASK_FCX_FCXO) << 6);
     /* new_FCX = M(EA, word); */
-    new_FCX = cpu_ldl_data(env, ea);
+    new_FCX = cpu_ldl_le_data(env, ea);
     /* M(EA, 16 * word) = {PCXI, PSW, A[10], A[11], D[8], D[9], D[10], D[11],
                            A[12], A[13], A[14], A[15], D[12], D[13], D[14],
                            D[15]}; */
@@ -2632,7 +2632,7 @@ void helper_ret(CPUTriCoreState *env)
         A[13], A[14], A[15], D[12], D[13], D[14], D[15]} = M(EA, 16 * word); */
     restore_context_upper(env, ea, &new_PCXI, &new_PSW);
     /* M(EA, word) = FCX; */
-    cpu_stl_data(env, ea, env->FCX);
+    cpu_stl_le_data(env, ea, env->FCX);
     /* FCX[19: 0] = PCXI[19: 0]; */
     env->FCX = (env->FCX & 0xfff00000) + (env->PCXI & 0x000fffff);
     /* PCXI = new_PCXI; */
@@ -2662,7 +2662,7 @@ void helper_bisr(CPUTriCoreState *env, uint32_t const9)
     ea = ((env->FCX & 0xf0000) << 12) + ((env->FCX & 0xffff) << 6);
 
     /* new_FCX = M(EA, word); */
-    new_FCX = cpu_ldl_data(env, ea);
+    new_FCX = cpu_ldl_le_data(env, ea);
     /* M(EA, 16 * word) = {PCXI, A[11], A[2], A[3], D[0], D[1], D[2], D[3], A[4]
                            , A[5], A[6], A[7], D[4], D[5], D[6], D[7]}; */
     save_context_lower(env, ea);
@@ -2726,7 +2726,7 @@ void helper_rfe(CPUTriCoreState *env)
       A[13], A[14], A[15], D[12], D[13], D[14], D[15]} = M(EA, 16 * word); */
     restore_context_upper(env, ea, &new_PCXI, &new_PSW);
     /* M(EA, word) = FCX;*/
-    cpu_stl_data(env, ea, env->FCX);
+    cpu_stl_le_data(env, ea, env->FCX);
     /* FCX[19: 0] = PCXI[19: 0]; */
     env->FCX = (env->FCX & 0xfff00000) + (env->PCXI & 0x000fffff);
     /* PCXI = new_PCXI; */
@@ -2744,10 +2744,10 @@ void helper_rfm(CPUTriCoreState *env)
     icr_set_ccpn(env, pcxi_get_pcpn(env));
 
     /* {PCXI, PSW, A[10], A[11]} = M(DCX, 4 * word); */
-    env->PCXI = cpu_ldl_data(env, env->DCX);
-    psw_write(env, cpu_ldl_data(env, env->DCX+4));
-    env->gpr_a[10] = cpu_ldl_data(env, env->DCX+8);
-    env->gpr_a[11] = cpu_ldl_data(env, env->DCX+12);
+    env->PCXI = cpu_ldl_le_data(env, env->DCX);
+    psw_write(env, cpu_ldl_le_data(env, env->DCX+4));
+    env->gpr_a[10] = cpu_ldl_le_data(env, env->DCX+8);
+    env->gpr_a[11] = cpu_ldl_le_data(env, env->DCX+12);
 
     if (tricore_has_feature(env, TRICORE_FEATURE_131)) {
         env->DBGTCR = 0;
@@ -2794,7 +2794,7 @@ void helper_svlcx(CPUTriCoreState *env)
     ea = ((env->FCX & MASK_FCX_FCXS) << 12) +
          ((env->FCX & MASK_FCX_FCXO) << 6);
     /* new_FCX = M(EA, word); */
-    new_FCX = cpu_ldl_data(env, ea);
+    new_FCX = cpu_ldl_le_data(env, ea);
     /* M(EA, 16 * word) = {PCXI, PSW, A[10], A[11], D[8], D[9], D[10], D[11],
                            A[12], A[13], A[14], A[15], D[12], D[13], D[14],
                            D[15]}; */
@@ -2837,7 +2837,7 @@ void helper_svucx(CPUTriCoreState *env)
     ea = ((env->FCX & MASK_FCX_FCXS) << 12) +
          ((env->FCX & MASK_FCX_FCXO) << 6);
     /* new_FCX = M(EA, word); */
-    new_FCX = cpu_ldl_data(env, ea);
+    new_FCX = cpu_ldl_le_data(env, ea);
     /* M(EA, 16 * word) = {PCXI, PSW, A[10], A[11], D[8], D[9], D[10], D[11],
                            A[12], A[13], A[14], A[15], D[12], D[13], D[14],
                            D[15]}; */
@@ -2887,9 +2887,9 @@ void helper_rslcx(CPUTriCoreState *env)
         A[13], A[14], A[15], D[12], D[13], D[14], D[15]} = M(EA, 16 * word); */
     restore_context_lower(env, ea, &env->gpr_a[11], &new_PCXI);
     /* M(EA, word) = FCX; */
-    cpu_stl_data(env, ea, env->FCX);
+    cpu_stl_le_data(env, ea, env->FCX);
     /* M(EA, word) = FCX; */
-    cpu_stl_data(env, ea, env->FCX);
+    cpu_stl_le_data(env, ea, env->FCX);
     /* FCX[19: 0] = PCXI[19: 0]; */
     env->FCX = (env->FCX & 0xfff00000) + (env->PCXI & 0x000fffff);
     /* PCXI = new_PCXI; */
-- 
2.51.0



  parent reply	other threads:[~2025-11-22  4:01 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-21 13:44 [RFC-PATCH-for-11.0 v3 00/21] accel/tcg: Remove most MO_TE uses in cpu_ld/st_code/data() Philippe Mathieu-Daudé
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 01/21] accel/tcg: Add endianness variants of cpu_ld{uw, l, q}_code() Philippe Mathieu-Daudé
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 02/21] target/alpha: Use little-endian variant of cpu_ldl_code() Philippe Mathieu-Daudé
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 03/21] target/loongarch: " Philippe Mathieu-Daudé
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 04/21] target/sparc: Use big-endian " Philippe Mathieu-Daudé
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 05/21] target/s390x: Use big-endian variant of cpu_ld{uw, l}_code() Philippe Mathieu-Daudé
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 06/21] target/riscv: Use little-endian variant of cpu_ld{l, q}_code() Philippe Mathieu-Daudé
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 07/21] target/ppc: Replace cpu_ldl_code() by explicit endianness variants Philippe Mathieu-Daudé
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 08/21] target/mips: Replace cpu_ld{uw, l}_code() " Philippe Mathieu-Daudé
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 09/21] accel/tcg: Remove non-explicit endian cpu_ld*_code() helpers Philippe Mathieu-Daudé
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 10/21] target/hexagon: Use little-endian variant of cpu_ld/st_data*() Philippe Mathieu-Daudé
2025-11-22  2:26   ` Brian Cain
2025-11-21 13:44 ` Philippe Mathieu-Daudé [this message]
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 12/21] target/rx: " Philippe Mathieu-Daudé
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 13/21] target/m68k: " Philippe Mathieu-Daudé
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 14/21] target/s390x: " Philippe Mathieu-Daudé
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 15/21] target/sparc: " Philippe Mathieu-Daudé
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 16/21] target/i386: " Philippe Mathieu-Daudé
2025-11-21 13:44 ` [RFC-PATCH-for-11.0 v3 17/21] target/hppa: " Philippe Mathieu-Daudé
2025-11-21 13:45 ` [RFC-PATCH-for-11.0 v3 18/21] target/riscv: Use little-endian variant of cpu_ld/st_data*() for vector Philippe Mathieu-Daudé
2025-11-21 13:45 ` [RFC-PATCH-for-11.0 v3 19/21] target/sh4: Replace cpu_stl_data() by explicit endianness variants Philippe Mathieu-Daudé
2025-11-21 13:45 ` [RFC-PATCH-for-11.0 v3 20/21] target/mips: Use big-endian variant of cpu_ld/st_data*() for MSA Philippe Mathieu-Daudé
2025-11-21 13:45 ` [RFC-PATCH-for-11.0 v3 21/21] accel/tcg: Remove non-explicit endian cpu_ld/st*_data*() helpers Philippe Mathieu-Daudé

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