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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-42cb7f34ffesm39509285f8f.10.2025.11.25.23.50.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 25 Nov 2025 23:50:47 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Bastian Koppelmann Subject: [PATCH-for-11.0 v2 06/12] target/tricore: Use little-endian variant of cpu_ld/st_data*() Date: Wed, 26 Nov 2025 08:49:57 +0100 Message-ID: <20251126075003.4826-7-philmd@linaro.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251126075003.4826-1-philmd@linaro.org> References: <20251126075003.4826-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=philmd@linaro.org; helo=mail-wr1-x441.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org We only build the TriCore target using little endianness order, therefore the cpu_ld/st_data*() definitions expand to the little endian declarations. Use the explicit little-endian variants. Mechanical change running: $ tgt=tricore; \ end=le; \ for op in data mmuidx_ra; do \ for ac in uw sw l q; do \ sed -i -e "s/cpu_ld${ac}_${op}/cpu_ld${ac}_${end}_${op}/" \ $(git grep -l cpu_ target/${tgt}/); \ done; for ac in w l q; do \ sed -i -e "s/cpu_st${ac}_${op}/cpu_st${ac}_${end}_${op}/" \ $(git grep -l cpu_ target/${tgt}/); \ done; done Then adapting spaces style manually to pass checkpatch.pl. Signed-off-by: Philippe Mathieu-Daudé --- target/tricore/op_helper.c | 152 ++++++++++++++++++------------------- 1 file changed, 76 insertions(+), 76 deletions(-) diff --git a/target/tricore/op_helper.c b/target/tricore/op_helper.c index 2c8281a67e0..fde2c0f8383 100644 --- a/target/tricore/op_helper.c +++ b/target/tricore/op_helper.c @@ -2451,84 +2451,84 @@ static bool cdc_zero(uint32_t *psw) static void save_context_upper(CPUTriCoreState *env, uint32_t ea) { - cpu_stl_data(env, ea, env->PCXI); - cpu_stl_data(env, ea+4, psw_read(env)); - cpu_stl_data(env, ea+8, env->gpr_a[10]); - cpu_stl_data(env, ea+12, env->gpr_a[11]); - cpu_stl_data(env, ea+16, env->gpr_d[8]); - cpu_stl_data(env, ea+20, env->gpr_d[9]); - cpu_stl_data(env, ea+24, env->gpr_d[10]); - cpu_stl_data(env, ea+28, env->gpr_d[11]); - cpu_stl_data(env, ea+32, env->gpr_a[12]); - cpu_stl_data(env, ea+36, env->gpr_a[13]); - cpu_stl_data(env, ea+40, env->gpr_a[14]); - cpu_stl_data(env, ea+44, env->gpr_a[15]); - cpu_stl_data(env, ea+48, env->gpr_d[12]); - cpu_stl_data(env, ea+52, env->gpr_d[13]); - cpu_stl_data(env, ea+56, env->gpr_d[14]); - cpu_stl_data(env, ea+60, env->gpr_d[15]); + cpu_stl_le_data(env, ea, env->PCXI); + cpu_stl_le_data(env, ea + 4, psw_read(env)); + cpu_stl_le_data(env, ea + 8, env->gpr_a[10]); + cpu_stl_le_data(env, ea + 12, env->gpr_a[11]); + cpu_stl_le_data(env, ea + 16, env->gpr_d[8]); + cpu_stl_le_data(env, ea + 20, env->gpr_d[9]); + cpu_stl_le_data(env, ea + 24, env->gpr_d[10]); + cpu_stl_le_data(env, ea + 28, env->gpr_d[11]); + cpu_stl_le_data(env, ea + 32, env->gpr_a[12]); + cpu_stl_le_data(env, ea + 36, env->gpr_a[13]); + cpu_stl_le_data(env, ea + 40, env->gpr_a[14]); + cpu_stl_le_data(env, ea + 44, env->gpr_a[15]); + cpu_stl_le_data(env, ea + 48, env->gpr_d[12]); + cpu_stl_le_data(env, ea + 52, env->gpr_d[13]); + cpu_stl_le_data(env, ea + 56, env->gpr_d[14]); + cpu_stl_le_data(env, ea + 60, env->gpr_d[15]); } static void save_context_lower(CPUTriCoreState *env, uint32_t ea) { - cpu_stl_data(env, ea, env->PCXI); - cpu_stl_data(env, ea+4, env->gpr_a[11]); - cpu_stl_data(env, ea+8, env->gpr_a[2]); - cpu_stl_data(env, ea+12, env->gpr_a[3]); - cpu_stl_data(env, ea+16, env->gpr_d[0]); - cpu_stl_data(env, ea+20, env->gpr_d[1]); - cpu_stl_data(env, ea+24, env->gpr_d[2]); - cpu_stl_data(env, ea+28, env->gpr_d[3]); - cpu_stl_data(env, ea+32, env->gpr_a[4]); - cpu_stl_data(env, ea+36, env->gpr_a[5]); - cpu_stl_data(env, ea+40, env->gpr_a[6]); - cpu_stl_data(env, ea+44, env->gpr_a[7]); - cpu_stl_data(env, ea+48, env->gpr_d[4]); - cpu_stl_data(env, ea+52, env->gpr_d[5]); - cpu_stl_data(env, ea+56, env->gpr_d[6]); - cpu_stl_data(env, ea+60, env->gpr_d[7]); + cpu_stl_le_data(env, ea, env->PCXI); + cpu_stl_le_data(env, ea + 4, env->gpr_a[11]); + cpu_stl_le_data(env, ea + 8, env->gpr_a[2]); + cpu_stl_le_data(env, ea + 12, env->gpr_a[3]); + cpu_stl_le_data(env, ea + 16, env->gpr_d[0]); + cpu_stl_le_data(env, ea + 20, env->gpr_d[1]); + cpu_stl_le_data(env, ea + 24, env->gpr_d[2]); + cpu_stl_le_data(env, ea + 28, env->gpr_d[3]); + cpu_stl_le_data(env, ea + 32, env->gpr_a[4]); + cpu_stl_le_data(env, ea + 36, env->gpr_a[5]); + cpu_stl_le_data(env, ea + 40, env->gpr_a[6]); + cpu_stl_le_data(env, ea + 44, env->gpr_a[7]); + cpu_stl_le_data(env, ea + 48, env->gpr_d[4]); + cpu_stl_le_data(env, ea + 52, env->gpr_d[5]); + cpu_stl_le_data(env, ea + 56, env->gpr_d[6]); + cpu_stl_le_data(env, ea + 60, env->gpr_d[7]); } static void restore_context_upper(CPUTriCoreState *env, uint32_t ea, uint32_t *new_PCXI, uint32_t *new_PSW) { - *new_PCXI = cpu_ldl_data(env, ea); - *new_PSW = cpu_ldl_data(env, ea+4); - env->gpr_a[10] = cpu_ldl_data(env, ea+8); - env->gpr_a[11] = cpu_ldl_data(env, ea+12); - env->gpr_d[8] = cpu_ldl_data(env, ea+16); - env->gpr_d[9] = cpu_ldl_data(env, ea+20); - env->gpr_d[10] = cpu_ldl_data(env, ea+24); - env->gpr_d[11] = cpu_ldl_data(env, ea+28); - env->gpr_a[12] = cpu_ldl_data(env, ea+32); - env->gpr_a[13] = cpu_ldl_data(env, ea+36); - env->gpr_a[14] = cpu_ldl_data(env, ea+40); - env->gpr_a[15] = cpu_ldl_data(env, ea+44); - env->gpr_d[12] = cpu_ldl_data(env, ea+48); - env->gpr_d[13] = cpu_ldl_data(env, ea+52); - env->gpr_d[14] = cpu_ldl_data(env, ea+56); - env->gpr_d[15] = cpu_ldl_data(env, ea+60); + *new_PCXI = cpu_ldl_le_data(env, ea); + *new_PSW = cpu_ldl_le_data(env, ea + 4); + env->gpr_a[10] = cpu_ldl_le_data(env, ea + 8); + env->gpr_a[11] = cpu_ldl_le_data(env, ea + 12); + env->gpr_d[8] = cpu_ldl_le_data(env, ea + 16); + env->gpr_d[9] = cpu_ldl_le_data(env, ea + 20); + env->gpr_d[10] = cpu_ldl_le_data(env, ea + 24); + env->gpr_d[11] = cpu_ldl_le_data(env, ea + 28); + env->gpr_a[12] = cpu_ldl_le_data(env, ea + 32); + env->gpr_a[13] = cpu_ldl_le_data(env, ea + 36); + env->gpr_a[14] = cpu_ldl_le_data(env, ea + 40); + env->gpr_a[15] = cpu_ldl_le_data(env, ea + 44); + env->gpr_d[12] = cpu_ldl_le_data(env, ea + 48); + env->gpr_d[13] = cpu_ldl_le_data(env, ea + 52); + env->gpr_d[14] = cpu_ldl_le_data(env, ea + 56); + env->gpr_d[15] = cpu_ldl_le_data(env, ea + 60); } static void restore_context_lower(CPUTriCoreState *env, uint32_t ea, uint32_t *ra, uint32_t *pcxi) { - *pcxi = cpu_ldl_data(env, ea); - *ra = cpu_ldl_data(env, ea+4); - env->gpr_a[2] = cpu_ldl_data(env, ea+8); - env->gpr_a[3] = cpu_ldl_data(env, ea+12); - env->gpr_d[0] = cpu_ldl_data(env, ea+16); - env->gpr_d[1] = cpu_ldl_data(env, ea+20); - env->gpr_d[2] = cpu_ldl_data(env, ea+24); - env->gpr_d[3] = cpu_ldl_data(env, ea+28); - env->gpr_a[4] = cpu_ldl_data(env, ea+32); - env->gpr_a[5] = cpu_ldl_data(env, ea+36); - env->gpr_a[6] = cpu_ldl_data(env, ea+40); - env->gpr_a[7] = cpu_ldl_data(env, ea+44); - env->gpr_d[4] = cpu_ldl_data(env, ea+48); - env->gpr_d[5] = cpu_ldl_data(env, ea+52); - env->gpr_d[6] = cpu_ldl_data(env, ea+56); - env->gpr_d[7] = cpu_ldl_data(env, ea+60); + *pcxi = cpu_ldl_le_data(env, ea); + *ra = cpu_ldl_le_data(env, ea + 4); + env->gpr_a[2] = cpu_ldl_le_data(env, ea + 8); + env->gpr_a[3] = cpu_ldl_le_data(env, ea + 12); + env->gpr_d[0] = cpu_ldl_le_data(env, ea + 16); + env->gpr_d[1] = cpu_ldl_le_data(env, ea + 20); + env->gpr_d[2] = cpu_ldl_le_data(env, ea + 24); + env->gpr_d[3] = cpu_ldl_le_data(env, ea + 28); + env->gpr_a[4] = cpu_ldl_le_data(env, ea + 32); + env->gpr_a[5] = cpu_ldl_le_data(env, ea + 36); + env->gpr_a[6] = cpu_ldl_le_data(env, ea + 40); + env->gpr_a[7] = cpu_ldl_le_data(env, ea + 44); + env->gpr_d[4] = cpu_ldl_le_data(env, ea + 48); + env->gpr_d[5] = cpu_ldl_le_data(env, ea + 52); + env->gpr_d[6] = cpu_ldl_le_data(env, ea + 56); + env->gpr_d[7] = cpu_ldl_le_data(env, ea + 60); } void helper_call(CPUTriCoreState *env, uint32_t next_pc) @@ -2566,7 +2566,7 @@ void helper_call(CPUTriCoreState *env, uint32_t next_pc) ea = ((env->FCX & MASK_FCX_FCXS) << 12) + ((env->FCX & MASK_FCX_FCXO) << 6); /* new_FCX = M(EA, word); */ - new_FCX = cpu_ldl_data(env, ea); + new_FCX = cpu_ldl_le_data(env, ea); /* M(EA, 16 * word) = {PCXI, PSW, A[10], A[11], D[8], D[9], D[10], D[11], A[12], A[13], A[14], A[15], D[12], D[13], D[14], D[15]}; */ @@ -2632,7 +2632,7 @@ void helper_ret(CPUTriCoreState *env) A[13], A[14], A[15], D[12], D[13], D[14], D[15]} = M(EA, 16 * word); */ restore_context_upper(env, ea, &new_PCXI, &new_PSW); /* M(EA, word) = FCX; */ - cpu_stl_data(env, ea, env->FCX); + cpu_stl_le_data(env, ea, env->FCX); /* FCX[19: 0] = PCXI[19: 0]; */ env->FCX = (env->FCX & 0xfff00000) + (env->PCXI & 0x000fffff); /* PCXI = new_PCXI; */ @@ -2662,7 +2662,7 @@ void helper_bisr(CPUTriCoreState *env, uint32_t const9) ea = ((env->FCX & 0xf0000) << 12) + ((env->FCX & 0xffff) << 6); /* new_FCX = M(EA, word); */ - new_FCX = cpu_ldl_data(env, ea); + new_FCX = cpu_ldl_le_data(env, ea); /* M(EA, 16 * word) = {PCXI, A[11], A[2], A[3], D[0], D[1], D[2], D[3], A[4] , A[5], A[6], A[7], D[4], D[5], D[6], D[7]}; */ save_context_lower(env, ea); @@ -2726,7 +2726,7 @@ void helper_rfe(CPUTriCoreState *env) A[13], A[14], A[15], D[12], D[13], D[14], D[15]} = M(EA, 16 * word); */ restore_context_upper(env, ea, &new_PCXI, &new_PSW); /* M(EA, word) = FCX;*/ - cpu_stl_data(env, ea, env->FCX); + cpu_stl_le_data(env, ea, env->FCX); /* FCX[19: 0] = PCXI[19: 0]; */ env->FCX = (env->FCX & 0xfff00000) + (env->PCXI & 0x000fffff); /* PCXI = new_PCXI; */ @@ -2744,10 +2744,10 @@ void helper_rfm(CPUTriCoreState *env) icr_set_ccpn(env, pcxi_get_pcpn(env)); /* {PCXI, PSW, A[10], A[11]} = M(DCX, 4 * word); */ - env->PCXI = cpu_ldl_data(env, env->DCX); - psw_write(env, cpu_ldl_data(env, env->DCX+4)); - env->gpr_a[10] = cpu_ldl_data(env, env->DCX+8); - env->gpr_a[11] = cpu_ldl_data(env, env->DCX+12); + env->PCXI = cpu_ldl_le_data(env, env->DCX); + psw_write(env, cpu_ldl_le_data(env, env->DCX+4)); + env->gpr_a[10] = cpu_ldl_le_data(env, env->DCX+8); + env->gpr_a[11] = cpu_ldl_le_data(env, env->DCX+12); if (tricore_has_feature(env, TRICORE_FEATURE_131)) { env->DBGTCR = 0; @@ -2794,7 +2794,7 @@ void helper_svlcx(CPUTriCoreState *env) ea = ((env->FCX & MASK_FCX_FCXS) << 12) + ((env->FCX & MASK_FCX_FCXO) << 6); /* new_FCX = M(EA, word); */ - new_FCX = cpu_ldl_data(env, ea); + new_FCX = cpu_ldl_le_data(env, ea); /* M(EA, 16 * word) = {PCXI, PSW, A[10], A[11], D[8], D[9], D[10], D[11], A[12], A[13], A[14], A[15], D[12], D[13], D[14], D[15]}; */ @@ -2837,7 +2837,7 @@ void helper_svucx(CPUTriCoreState *env) ea = ((env->FCX & MASK_FCX_FCXS) << 12) + ((env->FCX & MASK_FCX_FCXO) << 6); /* new_FCX = M(EA, word); */ - new_FCX = cpu_ldl_data(env, ea); + new_FCX = cpu_ldl_le_data(env, ea); /* M(EA, 16 * word) = {PCXI, PSW, A[10], A[11], D[8], D[9], D[10], D[11], A[12], A[13], A[14], A[15], D[12], D[13], D[14], D[15]}; */ @@ -2887,9 +2887,9 @@ void helper_rslcx(CPUTriCoreState *env) A[13], A[14], A[15], D[12], D[13], D[14], D[15]} = M(EA, 16 * word); */ restore_context_lower(env, ea, &env->gpr_a[11], &new_PCXI); /* M(EA, word) = FCX; */ - cpu_stl_data(env, ea, env->FCX); + cpu_stl_le_data(env, ea, env->FCX); /* M(EA, word) = FCX; */ - cpu_stl_data(env, ea, env->FCX); + cpu_stl_le_data(env, ea, env->FCX); /* FCX[19: 0] = PCXI[19: 0]; */ env->FCX = (env->FCX & 0xfff00000) + (env->PCXI & 0x000fffff); /* PCXI = new_PCXI; */ -- 2.51.0