[PATCH V3 0/4] Basic ASID2 Support

[Jim MacArthur <jim.macarthur@linaro.org>]

Addressed some more review comments - thank you Alex and Richard for the reviews.

Changes in v3:
- Patch 2&3 (was 2):
  - Split patch 2 into 2 parts, one enabling FNG1, FNG0, and A2, and another
    enabling ASID2 for cpu_max. The patch enabling cpu_max can be dropped or
    reverted later if not desired at this time.
- Patch 4 (was 3):
  - Check for presence of TCR2_EL1 in test, abort test if not present.
  - Additionally test that new fields read as RES0 if ASID2 is not present.

Changes in v2:
- patch 2:
  - Added FNG1, FNG0, A2 to mask for tcr2_el2_write
- patch 3:
  - Changed test for ASID from "=0x100" to "!= 0"

*** BLURB HERE ***

Jim MacArthur (4):
  target/arm: Enable ID_AA64MMFR4_EL1 register.
  target/arm: Allow writes to FNG1, FNG0, A2
  target/arm/tcg/cpu64.c: Enable ASID2 for cpu_max
  tests: Add test for ASID2 and write/read of feature bits

 target/arm/cpu-features.h        |  7 +++
 target/arm/cpu-sysregs.h.inc     |  1 +
 target/arm/helper.c              | 10 ++++-
 target/arm/tcg/cpu64.c           |  4 ++
 tests/tcg/aarch64/system/asid2.c | 75 ++++++++++++++++++++++++++++++++
 5 files changed, 95 insertions(+), 2 deletions(-)
 create mode 100644 tests/tcg/aarch64/system/asid2.c

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2.43.0