From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-s390x@nongnu.org,
"Richard Henderson" <richard.henderson@linaro.org>,
qemu-riscv@nongnu.org, qemu-ppc@nongnu.org,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Nicholas Piggin" <npiggin@gmail.com>,
"Chinmay Rath" <rathc@linux.ibm.com>
Subject: [PATCH-for-11.0 v3 19/22] target/ppc: Inline cpu_ld/st_mmuidx_ra() calls in memory helpers
Date: Wed, 26 Nov 2025 21:21:55 +0100 [thread overview]
Message-ID: <20251126202200.23100-20-philmd@linaro.org> (raw)
In-Reply-To: <20251126202200.23100-1-philmd@linaro.org>
In preparation of removing the cpu_ld*_mmuidx_ra() and
cpu_st*_mmuidx_ra() calls, inline them.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/ppc/mem_helper.c | 36 ++++++++++++++++++++++++++----------
1 file changed, 26 insertions(+), 10 deletions(-)
diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c
index 6ab71a6fcb4..a43726d4223 100644
--- a/target/ppc/mem_helper.c
+++ b/target/ppc/mem_helper.c
@@ -97,8 +97,10 @@ void helper_lmw(CPUPPCState *env, target_ulong addr, uint32_t reg)
}
} else {
/* Slow path -- at least some of the operation requires i/o. */
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_UNALN, mmu_idx);
+
for (; reg < 32; reg++) {
- env->gpr[reg] = cpu_ldl_mmuidx_ra(env, addr, mmu_idx, raddr);
+ env->gpr[reg] = cpu_ldl_mmu(env, addr, oi, raddr);
addr = addr_add(env, addr, 4);
}
}
@@ -120,7 +122,9 @@ void helper_stmw(CPUPPCState *env, target_ulong addr, uint32_t reg)
} else {
/* Slow path -- at least some of the operation requires i/o. */
for (; reg < 32; reg++) {
- cpu_stl_mmuidx_ra(env, addr, env->gpr[reg], mmu_idx, raddr);
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_UNALN, mmu_idx);
+
+ cpu_stl_mmu(env, addr, env->gpr[reg], oi, raddr);
addr = addr_add(env, addr, 4);
}
}
@@ -161,9 +165,11 @@ static void do_lsw(CPUPPCState *env, target_ulong addr, uint32_t nb,
break;
}
} else {
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UL | MO_UNALN, mmu_idx);
+
/* Slow path -- at least some of the operation requires i/o. */
for (; nb > 3; nb -= 4) {
- env->gpr[reg] = cpu_ldl_mmuidx_ra(env, addr, mmu_idx, raddr);
+ env->gpr[reg] = cpu_ldl_mmu(env, addr, oi, raddr);
reg = (reg + 1) % 32;
addr = addr_add(env, addr, 4);
}
@@ -174,10 +180,12 @@ static void do_lsw(CPUPPCState *env, target_ulong addr, uint32_t nb,
val = cpu_ldub_mmuidx_ra(env, addr, mmu_idx, raddr) << 24;
break;
case 2:
- val = cpu_lduw_mmuidx_ra(env, addr, mmu_idx, raddr) << 16;
+ oi = make_memop_idx(MO_TE | MO_UW | MO_UNALN, mmu_idx);
+ val = cpu_ldw_mmu(env, addr, oi, raddr) << 16;
break;
case 3:
- val = cpu_lduw_mmuidx_ra(env, addr, mmu_idx, raddr) << 16;
+ oi = make_memop_idx(MO_TE | MO_UW | MO_UNALN, mmu_idx);
+ val = cpu_ldw_mmu(env, addr, oi, raddr) << 16;
addr = addr_add(env, addr, 2);
val |= cpu_ldub_mmuidx_ra(env, addr, mmu_idx, raddr) << 8;
break;
@@ -250,8 +258,11 @@ void helper_stsw(CPUPPCState *env, target_ulong addr, uint32_t nb,
break;
}
} else {
+ MemOpIdx oi;
+
+ oi = make_memop_idx(MO_TE | MO_UL | MO_UNALN, mmu_idx);
for (; nb > 3; nb -= 4) {
- cpu_stl_mmuidx_ra(env, addr, env->gpr[reg], mmu_idx, raddr);
+ cpu_stl_mmu(env, addr, env->gpr[reg], oi, raddr);
reg = (reg + 1) % 32;
addr = addr_add(env, addr, 4);
}
@@ -261,10 +272,12 @@ void helper_stsw(CPUPPCState *env, target_ulong addr, uint32_t nb,
cpu_stb_mmuidx_ra(env, addr, val >> 24, mmu_idx, raddr);
break;
case 2:
- cpu_stw_mmuidx_ra(env, addr, val >> 16, mmu_idx, raddr);
+ oi = make_memop_idx(MO_TE | MO_UW | MO_UNALN, mmu_idx);
+ cpu_stw_mmu(env, addr, val >> 16, oi, raddr);
break;
case 3:
- cpu_stw_mmuidx_ra(env, addr, val >> 16, mmu_idx, raddr);
+ oi = make_memop_idx(MO_TE | MO_UW | MO_UNALN, mmu_idx);
+ cpu_stw_mmu(env, addr, val >> 16, oi, raddr);
addr = addr_add(env, addr, 2);
cpu_stb_mmuidx_ra(env, addr, val >> 8, mmu_idx, raddr);
break;
@@ -293,8 +306,10 @@ static void dcbz_common(CPUPPCState *env, target_ulong addr,
haddr = probe_write(env, addr, dcbz_size, mmu_idx, retaddr);
if (unlikely(!haddr)) {
/* Slow path */
+ MemOpIdx oi = make_memop_idx(MO_TE | MO_UQ | MO_UNALN, mmu_idx);
+
for (int i = 0; i < dcbz_size; i += 8) {
- cpu_stq_mmuidx_ra(env, addr + i, 0, mmu_idx, retaddr);
+ cpu_stq_mmu(env, addr + i, 0, oi, retaddr);
}
return;
}
@@ -342,9 +357,10 @@ void helper_icbi(CPUPPCState *env, target_ulong addr)
void helper_icbiep(CPUPPCState *env, target_ulong addr)
{
#if !defined(CONFIG_USER_ONLY)
+ MemOpIdx oi = make_memop_idx(MO_UL | MO_UNALN, PPC_TLB_EPID_LOAD);
/* See comments above */
addr &= ~(env->dcache_line_size - 1);
- cpu_ldl_mmuidx_ra(env, addr, PPC_TLB_EPID_LOAD, GETPC());
+ cpu_ldl_mmu(env, addr, oi, GETPC());
#endif
}
--
2.51.0
next prev parent reply other threads:[~2025-11-26 20:27 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-26 20:21 [PATCH-for-11.0 v3 00/22] accel/tcg: Remove most MO_TE uses in cpu_ld/st_data() Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 01/22] target/hexagon: Use little-endian variant of cpu_ld/st_data*() Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 02/22] target/i386: " Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 03/22] target/riscv: Use little-endian variant of cpu_ld/st_data*() for vector Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 04/22] target/rx: Use little-endian variant of cpu_ld/st_data*() Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 05/22] target/tricore: " Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 06/22] target/hppa: Use big-endian " Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 07/22] target/m68k: " Philippe Mathieu-Daudé
2025-12-05 20:02 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 08/22] target/s390x: " Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 09/22] target/sparc: " Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 10/22] target/sh4: Replace cpu_stl_data() call in OCBI helper Philippe Mathieu-Daudé
2025-12-05 20:03 ` Richard Henderson
2025-12-05 20:06 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 11/22] target/mips: Use big-endian variant of cpu_ld/st_data*() for MSA opcode Philippe Mathieu-Daudé
2025-12-12 16:28 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 12/22] target/mips: Introduce loadu8() & loads4() helpers Philippe Mathieu-Daudé
2025-12-12 16:32 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 13/22] target/mips: Pass MemOpIdx to atomic load helpers Philippe Mathieu-Daudé
2025-12-12 16:33 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 14/22] target/mips: Drop almask argument of HELPER_LD_ATOMIC() macro Philippe Mathieu-Daudé
2025-12-12 16:35 ` Richard Henderson
2025-12-12 16:43 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 15/22] target/mips: Inline cpu_ld*_mmuidx_ra() calls in atomic load helpers Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 16/22] target/mips: Expand HELPER_LD_ATOMIC() Philippe Mathieu-Daudé
2025-12-12 16:46 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 17/22] target/mips: Inline cpu_ld/st_mmuidx_ra() calls in memory helpers Philippe Mathieu-Daudé
2025-12-12 16:55 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 18/22] target/ppc: Inline cpu_ld/st_data_ra() calls in do_hash() Philippe Mathieu-Daudé
2025-12-12 16:57 ` Richard Henderson
2025-11-26 20:21 ` Philippe Mathieu-Daudé [this message]
2025-12-12 16:59 ` [PATCH-for-11.0 v3 19/22] target/ppc: Inline cpu_ld/st_mmuidx_ra() calls in memory helpers Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 20/22] target/ppc: Inline cpu_ldl_data_ra() calls in ICBI helper Philippe Mathieu-Daudé
2025-12-12 17:01 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 21/22] target/ppc: Simplify endianness handling in Altivec opcodes Philippe Mathieu-Daudé
2025-12-12 17:02 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 22/22] accel/tcg: Remove non-explicit endian cpu_ld/st*_data*() helpers Philippe Mathieu-Daudé
2025-11-26 20:32 ` Philippe Mathieu-Daudé
2025-12-12 17:02 ` Richard Henderson
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