From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-s390x@nongnu.org,
"Richard Henderson" <richard.henderson@linaro.org>,
qemu-riscv@nongnu.org, qemu-ppc@nongnu.org,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Laurent Vivier" <laurent@vivier.eu>
Subject: [PATCH-for-11.0 v3 07/22] target/m68k: Use big-endian variant of cpu_ld/st_data*()
Date: Wed, 26 Nov 2025 21:21:43 +0100 [thread overview]
Message-ID: <20251126202200.23100-8-philmd@linaro.org> (raw)
In-Reply-To: <20251126202200.23100-1-philmd@linaro.org>
We only build the M68k target using big endianness order,
therefore the cpu_ld/st_data*() definitions expand to the
big endian declarations. Use the explicit big-endian variants.
Mechanical change running:
$ tgt=m68k; \
end=be; \
for op in data mmuidx_ra; do \
for ac in uw sw l q; do \
sed -i -e "s/cpu_ld${ac}_${op}/cpu_ld${ac}_${end}_${op}/" \
$(git grep -l cpu_ target/${tgt}/); \
done;
for ac in w l q; do \
sed -i -e "s/cpu_st${ac}_${op}/cpu_st${ac}_${end}_${op}/" \
$(git grep -l cpu_ target/${tgt}/); \
done;
done
Then adapting indentation in do_stack_frame() to pass checkpatch.pl.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/m68k/fpu_helper.c | 12 +++---
target/m68k/op_helper.c | 91 ++++++++++++++++++++--------------------
2 files changed, 52 insertions(+), 51 deletions(-)
diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c
index 56012863c85..f49f841d489 100644
--- a/target/m68k/fpu_helper.c
+++ b/target/m68k/fpu_helper.c
@@ -510,8 +510,8 @@ static int cpu_ld_floatx80_ra(CPUM68KState *env, uint32_t addr, FPReg *fp,
uint32_t high;
uint64_t low;
- high = cpu_ldl_data_ra(env, addr, ra);
- low = cpu_ldq_data_ra(env, addr + 4, ra);
+ high = cpu_ldl_be_data_ra(env, addr, ra);
+ low = cpu_ldq_be_data_ra(env, addr + 4, ra);
fp->l.upper = high >> 16;
fp->l.lower = low;
@@ -522,8 +522,8 @@ static int cpu_ld_floatx80_ra(CPUM68KState *env, uint32_t addr, FPReg *fp,
static int cpu_st_floatx80_ra(CPUM68KState *env, uint32_t addr, FPReg *fp,
uintptr_t ra)
{
- cpu_stl_data_ra(env, addr, fp->l.upper << 16, ra);
- cpu_stq_data_ra(env, addr + 4, fp->l.lower, ra);
+ cpu_stl_be_data_ra(env, addr, fp->l.upper << 16, ra);
+ cpu_stq_be_data_ra(env, addr + 4, fp->l.lower, ra);
return 12;
}
@@ -533,7 +533,7 @@ static int cpu_ld_float64_ra(CPUM68KState *env, uint32_t addr, FPReg *fp,
{
uint64_t val;
- val = cpu_ldq_data_ra(env, addr, ra);
+ val = cpu_ldq_be_data_ra(env, addr, ra);
fp->d = float64_to_floatx80(*(float64 *)&val, &env->fp_status);
return 8;
@@ -545,7 +545,7 @@ static int cpu_st_float64_ra(CPUM68KState *env, uint32_t addr, FPReg *fp,
float64 val;
val = floatx80_to_float64(fp->d, &env->fp_status);
- cpu_stq_data_ra(env, addr, *(uint64_t *)&val, ra);
+ cpu_stq_be_data_ra(env, addr, *(uint64_t *)&val, ra);
return 8;
}
diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c
index e9c20a8e032..7139a8445d4 100644
--- a/target/m68k/op_helper.c
+++ b/target/m68k/op_helper.c
@@ -32,8 +32,8 @@ static void cf_rte(CPUM68KState *env)
uint32_t fmt;
sp = env->aregs[7];
- fmt = cpu_ldl_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
- env->pc = cpu_ldl_mmuidx_ra(env, sp + 4, MMU_KERNEL_IDX, 0);
+ fmt = cpu_ldl_be_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
+ env->pc = cpu_ldl_be_mmuidx_ra(env, sp + 4, MMU_KERNEL_IDX, 0);
sp |= (fmt >> 28) & 3;
env->aregs[7] = sp + 8;
@@ -48,13 +48,13 @@ static void m68k_rte(CPUM68KState *env)
sp = env->aregs[7];
throwaway:
- sr = cpu_lduw_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
+ sr = cpu_lduw_be_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
sp += 2;
- env->pc = cpu_ldl_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
+ env->pc = cpu_ldl_be_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
sp += 4;
if (m68k_feature(env, M68K_FEATURE_EXCEPTION_FORMAT_VEC)) {
/* all except 68000 */
- fmt = cpu_lduw_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
+ fmt = cpu_lduw_be_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0);
sp += 2;
switch (fmt >> 12) {
case 0:
@@ -250,12 +250,12 @@ static void cf_interrupt_all(CPUM68KState *env, int is_hw)
/* ??? This could cause MMU faults. */
sp &= ~3;
sp -= 4;
- cpu_stl_mmuidx_ra(env, sp, retaddr, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, sp, retaddr, MMU_KERNEL_IDX, 0);
sp -= 4;
- cpu_stl_mmuidx_ra(env, sp, fmt, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, sp, fmt, MMU_KERNEL_IDX, 0);
env->aregs[7] = sp;
/* Jump to vector. */
- env->pc = cpu_ldl_mmuidx_ra(env, env->vbr + vector, MMU_KERNEL_IDX, 0);
+ env->pc = cpu_ldl_be_mmuidx_ra(env, env->vbr + vector, MMU_KERNEL_IDX, 0);
do_plugin_vcpu_interrupt_cb(cs, retaddr);
}
@@ -270,24 +270,25 @@ static inline void do_stack_frame(CPUM68KState *env, uint32_t *sp,
switch (format) {
case 4:
*sp -= 4;
- cpu_stl_mmuidx_ra(env, *sp, env->pc, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, *sp, env->pc, MMU_KERNEL_IDX, 0);
*sp -= 4;
- cpu_stl_mmuidx_ra(env, *sp, addr, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, *sp, addr, MMU_KERNEL_IDX, 0);
break;
case 3:
case 2:
*sp -= 4;
- cpu_stl_mmuidx_ra(env, *sp, addr, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, *sp, addr, MMU_KERNEL_IDX, 0);
break;
}
*sp -= 2;
- cpu_stw_mmuidx_ra(env, *sp, (format << 12) + (cs->exception_index << 2),
- MMU_KERNEL_IDX, 0);
+ cpu_stw_be_mmuidx_ra(env, *sp,
+ (format << 12) + (cs->exception_index << 2),
+ MMU_KERNEL_IDX, 0);
}
*sp -= 4;
- cpu_stl_mmuidx_ra(env, *sp, retaddr, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, *sp, retaddr, MMU_KERNEL_IDX, 0);
*sp -= 2;
- cpu_stw_mmuidx_ra(env, *sp, sr, MMU_KERNEL_IDX, 0);
+ cpu_stw_be_mmuidx_ra(env, *sp, sr, MMU_KERNEL_IDX, 0);
}
static void m68k_interrupt_all(CPUM68KState *env, int is_hw)
@@ -346,49 +347,49 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw)
env->mmu.fault = true;
/* push data 3 */
sp -= 4;
- cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
/* push data 2 */
sp -= 4;
- cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
/* push data 1 */
sp -= 4;
- cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
/* write back 1 / push data 0 */
sp -= 4;
- cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
/* write back 1 address */
sp -= 4;
- cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
/* write back 2 data */
sp -= 4;
- cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
/* write back 2 address */
sp -= 4;
- cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
/* write back 3 data */
sp -= 4;
- cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
/* write back 3 address */
sp -= 4;
- cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0);
/* fault address */
sp -= 4;
- cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0);
/* write back 1 status */
sp -= 2;
- cpu_stw_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ cpu_stw_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
/* write back 2 status */
sp -= 2;
- cpu_stw_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ cpu_stw_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
/* write back 3 status */
sp -= 2;
- cpu_stw_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
+ cpu_stw_be_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0);
/* special status word */
sp -= 2;
- cpu_stw_mmuidx_ra(env, sp, env->mmu.ssw, MMU_KERNEL_IDX, 0);
+ cpu_stw_be_mmuidx_ra(env, sp, env->mmu.ssw, MMU_KERNEL_IDX, 0);
/* effective address */
sp -= 4;
- cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0);
+ cpu_stl_be_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0);
do_stack_frame(env, &sp, 7, oldsr, 0, env->pc);
env->mmu.fault = false;
@@ -436,7 +437,7 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw)
env->aregs[7] = sp;
/* Jump to vector. */
- env->pc = cpu_ldl_mmuidx_ra(env, env->vbr + vector, MMU_KERNEL_IDX, 0);
+ env->pc = cpu_ldl_be_mmuidx_ra(env, env->vbr + vector, MMU_KERNEL_IDX, 0);
do_plugin_vcpu_interrupt_cb(cs, last_pc);
}
@@ -784,11 +785,11 @@ void HELPER(cas2w)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2)
int16_t l1, l2;
uintptr_t ra = GETPC();
- l1 = cpu_lduw_data_ra(env, a1, ra);
- l2 = cpu_lduw_data_ra(env, a2, ra);
+ l1 = cpu_lduw_be_data_ra(env, a1, ra);
+ l2 = cpu_lduw_be_data_ra(env, a2, ra);
if (l1 == c1 && l2 == c2) {
- cpu_stw_data_ra(env, a1, u1, ra);
- cpu_stw_data_ra(env, a2, u2, ra);
+ cpu_stw_be_data_ra(env, a1, u1, ra);
+ cpu_stw_be_data_ra(env, a2, u2, ra);
}
if (c1 != l1) {
@@ -845,11 +846,11 @@ static void do_cas2l(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2,
}
} else {
/* We're executing in a serial context -- no need to be atomic. */
- l1 = cpu_ldl_data_ra(env, a1, ra);
- l2 = cpu_ldl_data_ra(env, a2, ra);
+ l1 = cpu_ldl_be_data_ra(env, a1, ra);
+ l2 = cpu_ldl_be_data_ra(env, a2, ra);
if (l1 == c1 && l2 == c2) {
- cpu_stl_data_ra(env, a1, u1, ra);
- cpu_stl_data_ra(env, a2, u2, ra);
+ cpu_stl_be_data_ra(env, a1, u1, ra);
+ cpu_stl_be_data_ra(env, a2, u2, ra);
}
}
@@ -951,12 +952,12 @@ static uint64_t bf_load(CPUM68KState *env, uint32_t addr, int blen,
case 0:
return cpu_ldub_data_ra(env, addr, ra);
case 1:
- return cpu_lduw_data_ra(env, addr, ra);
+ return cpu_lduw_be_data_ra(env, addr, ra);
case 2:
case 3:
- return cpu_ldl_data_ra(env, addr, ra);
+ return cpu_ldl_be_data_ra(env, addr, ra);
case 4:
- return cpu_ldq_data_ra(env, addr, ra);
+ return cpu_ldq_be_data_ra(env, addr, ra);
default:
g_assert_not_reached();
}
@@ -970,14 +971,14 @@ static void bf_store(CPUM68KState *env, uint32_t addr, int blen,
cpu_stb_data_ra(env, addr, data, ra);
break;
case 1:
- cpu_stw_data_ra(env, addr, data, ra);
+ cpu_stw_be_data_ra(env, addr, data, ra);
break;
case 2:
case 3:
- cpu_stl_data_ra(env, addr, data, ra);
+ cpu_stl_be_data_ra(env, addr, data, ra);
break;
case 4:
- cpu_stq_data_ra(env, addr, data, ra);
+ cpu_stq_be_data_ra(env, addr, data, ra);
break;
default:
g_assert_not_reached();
--
2.51.0
next prev parent reply other threads:[~2025-11-26 20:25 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-26 20:21 [PATCH-for-11.0 v3 00/22] accel/tcg: Remove most MO_TE uses in cpu_ld/st_data() Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 01/22] target/hexagon: Use little-endian variant of cpu_ld/st_data*() Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 02/22] target/i386: " Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 03/22] target/riscv: Use little-endian variant of cpu_ld/st_data*() for vector Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 04/22] target/rx: Use little-endian variant of cpu_ld/st_data*() Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 05/22] target/tricore: " Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 06/22] target/hppa: Use big-endian " Philippe Mathieu-Daudé
2025-11-26 20:21 ` Philippe Mathieu-Daudé [this message]
2025-12-05 20:02 ` [PATCH-for-11.0 v3 07/22] target/m68k: " Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 08/22] target/s390x: " Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 09/22] target/sparc: " Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 10/22] target/sh4: Replace cpu_stl_data() call in OCBI helper Philippe Mathieu-Daudé
2025-12-05 20:03 ` Richard Henderson
2025-12-05 20:06 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 11/22] target/mips: Use big-endian variant of cpu_ld/st_data*() for MSA opcode Philippe Mathieu-Daudé
2025-12-12 16:28 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 12/22] target/mips: Introduce loadu8() & loads4() helpers Philippe Mathieu-Daudé
2025-12-12 16:32 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 13/22] target/mips: Pass MemOpIdx to atomic load helpers Philippe Mathieu-Daudé
2025-12-12 16:33 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 14/22] target/mips: Drop almask argument of HELPER_LD_ATOMIC() macro Philippe Mathieu-Daudé
2025-12-12 16:35 ` Richard Henderson
2025-12-12 16:43 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 15/22] target/mips: Inline cpu_ld*_mmuidx_ra() calls in atomic load helpers Philippe Mathieu-Daudé
2025-11-26 20:21 ` [PATCH-for-11.0 v3 16/22] target/mips: Expand HELPER_LD_ATOMIC() Philippe Mathieu-Daudé
2025-12-12 16:46 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 17/22] target/mips: Inline cpu_ld/st_mmuidx_ra() calls in memory helpers Philippe Mathieu-Daudé
2025-12-12 16:55 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 18/22] target/ppc: Inline cpu_ld/st_data_ra() calls in do_hash() Philippe Mathieu-Daudé
2025-12-12 16:57 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 19/22] target/ppc: Inline cpu_ld/st_mmuidx_ra() calls in memory helpers Philippe Mathieu-Daudé
2025-12-12 16:59 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 20/22] target/ppc: Inline cpu_ldl_data_ra() calls in ICBI helper Philippe Mathieu-Daudé
2025-12-12 17:01 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 21/22] target/ppc: Simplify endianness handling in Altivec opcodes Philippe Mathieu-Daudé
2025-12-12 17:02 ` Richard Henderson
2025-11-26 20:21 ` [PATCH-for-11.0 v3 22/22] accel/tcg: Remove non-explicit endian cpu_ld/st*_data*() helpers Philippe Mathieu-Daudé
2025-11-26 20:32 ` Philippe Mathieu-Daudé
2025-12-12 17:02 ` Richard Henderson
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