* [PATCH v4 0/2] hw/nvme: Properties for PCI vendor/dev IDs and IEEE-OUI
@ 2025-11-27 12:02 Saif Abrar
2025-11-27 12:02 ` [PATCH v4 1/2] hw/nvme: Add properties for PCI vendor/device IDs Saif Abrar
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Saif Abrar @ 2025-11-27 12:02 UTC (permalink / raw)
To: kbusch, its, foss
Cc: qemu-block, qemu-devel, npiggin, saif.abrar, nikhilks, stefanha,
fam, philmd
Add properties for user-specified PCI vendor/device IDs and IEEE-OUI.
PCI properties are now set independently of each other and
used only when use_intel_id is not set.
Saif Abrar (2):
hw/nvme: Add properties for PCI vendor/device IDs
hw/nvme: Add property for user-specified IEEE-OUI ID
hw/nvme/ctrl.c | 52 +++++++++++++++++++++++++++++++++++++++++++++++---
hw/nvme/nvme.h | 7 +++++++
2 files changed, 56 insertions(+), 3 deletions(-)
--
v3 -> v4: Resolve merge commits when moving to the latest repo.
2.47.3
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v4 1/2] hw/nvme: Add properties for PCI vendor/device IDs
2025-11-27 12:02 [PATCH v4 0/2] hw/nvme: Properties for PCI vendor/dev IDs and IEEE-OUI Saif Abrar
@ 2025-11-27 12:02 ` Saif Abrar
2025-11-27 12:02 ` [PATCH v4 2/2] hw/nvme: Add property for user-specified IEEE-OUI ID Saif Abrar
2025-12-12 10:00 ` [PATCH v4 0/2] hw/nvme: Properties for PCI vendor/dev IDs and IEEE-OUI Jesper Devantier
2 siblings, 0 replies; 4+ messages in thread
From: Saif Abrar @ 2025-11-27 12:02 UTC (permalink / raw)
To: kbusch, its, foss
Cc: qemu-block, qemu-devel, npiggin, saif.abrar, nikhilks, stefanha,
fam, philmd
Add properties for user specified PCI vendor, device, subsystem vendor
and subsystem IDs.
e.g. PCI IDs to be specified as follows:
-device nvme,id_vendor=0xABCD,id_device=0xA0B0,id_subsys_vendor=0xEF00,id_subsys=0xEF01
Signed-off-by: Saif Abrar <saif.abrar@linux.vnet.ibm.com>
---
v3 -> v4: Resolve merge commits when moving to the latest repo.
hw/nvme/ctrl.c | 28 +++++++++++++++++++++++++---
hw/nvme/nvme.h | 5 +++++
2 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index cc4593cd42..d857be5496 100644
--- a/hw/nvme/ctrl.c
+++ b/hw/nvme/ctrl.c
@@ -8877,7 +8877,10 @@ static bool nvme_init_sriov(NvmeCtrl *n, PCIDevice *pci_dev, uint16_t offset,
Error **errp)
{
uint16_t vf_dev_id = n->params.use_intel_id ?
- PCI_DEVICE_ID_INTEL_NVME : PCI_DEVICE_ID_REDHAT_NVME;
+ PCI_DEVICE_ID_INTEL_NVME :
+ (n->params.id_device ?
+ n->params.id_device : PCI_DEVICE_ID_REDHAT_NVME);
+
NvmePriCtrlCap *cap = &n->pri_ctrl_cap;
uint64_t bar_size = nvme_mbar_size(le16_to_cpu(cap->vqfrsm),
le16_to_cpu(cap->vifrsm),
@@ -8953,8 +8956,22 @@ static bool nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev, Error **errp)
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_NVME);
} else {
- pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REDHAT);
- pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_REDHAT_NVME);
+ uint16_t id_vendor = n->params.id_vendor ?
+ n->params.id_vendor : PCI_VENDOR_ID_REDHAT;
+ pci_config_set_vendor_id(pci_conf, id_vendor);
+
+ uint16_t id_device = n->params.id_device ?
+ n->params.id_device : PCI_DEVICE_ID_REDHAT_NVME;
+ pci_config_set_device_id(pci_conf, id_device);
+
+ if (n->params.id_subsys_vendor) {
+ pci_set_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID,
+ n->params.id_subsys_vendor);
+ }
+
+ if (n->params.id_subsys) {
+ pci_set_word(pci_conf + PCI_SUBSYSTEM_ID, n->params.id_subsys);
+ }
}
pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_EXPRESS);
@@ -9409,6 +9426,11 @@ static const Property nvme_props[] = {
DEFINE_PROP_UINT16("atomic.awun", NvmeCtrl, params.atomic_awun, 0),
DEFINE_PROP_UINT16("atomic.awupf", NvmeCtrl, params.atomic_awupf, 0),
DEFINE_PROP_BOOL("ocp", NvmeCtrl, params.ocp, false),
+ DEFINE_PROP_UINT16("id_vendor", NvmeCtrl, params.id_vendor, 0),
+ DEFINE_PROP_UINT16("id_device", NvmeCtrl, params.id_device, 0),
+ DEFINE_PROP_UINT16("id_subsys_vendor", NvmeCtrl,
+ params.id_subsys_vendor, 0),
+ DEFINE_PROP_UINT16("id_subsys", NvmeCtrl, params.id_subsys, 0),
};
static void nvme_get_smart_warning(Object *obj, Visitor *v, const char *name,
diff --git a/hw/nvme/nvme.h b/hw/nvme/nvme.h
index 8f8c78c850..65fb168bc9 100644
--- a/hw/nvme/nvme.h
+++ b/hw/nvme/nvme.h
@@ -571,6 +571,11 @@ typedef struct NvmeParams {
uint16_t atomic_awun;
uint16_t atomic_awupf;
bool atomic_dn;
+
+ uint16_t id_vendor;
+ uint16_t id_device;
+ uint16_t id_subsys_vendor;
+ uint16_t id_subsys;
} NvmeParams;
typedef struct NvmeCtrl {
--
2.47.3
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v4 2/2] hw/nvme: Add property for user-specified IEEE-OUI ID
2025-11-27 12:02 [PATCH v4 0/2] hw/nvme: Properties for PCI vendor/dev IDs and IEEE-OUI Saif Abrar
2025-11-27 12:02 ` [PATCH v4 1/2] hw/nvme: Add properties for PCI vendor/device IDs Saif Abrar
@ 2025-11-27 12:02 ` Saif Abrar
2025-12-12 10:00 ` [PATCH v4 0/2] hw/nvme: Properties for PCI vendor/dev IDs and IEEE-OUI Jesper Devantier
2 siblings, 0 replies; 4+ messages in thread
From: Saif Abrar @ 2025-11-27 12:02 UTC (permalink / raw)
To: kbusch, its, foss
Cc: qemu-block, qemu-devel, npiggin, saif.abrar, nikhilks, stefanha,
fam, philmd
User-specified IEEE-OUI ID (Identify Controller bytes 75:73)
is to be specified in LE format.
(e.g. ieee_oui=0xABCDEF => Byte[73]=0xEF, Byte[74]=0xCD, Byte[75]=0xAB)
Signed-off-by: Saif Abrar <saif.abrar@linux.vnet.ibm.com>
---
v3 -> v4: Resolve merge commits when moving to the latest repo.
hw/nvme/ctrl.c | 24 ++++++++++++++++++++++++
hw/nvme/nvme.h | 2 ++
2 files changed, 26 insertions(+)
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index d857be5496..c66524c78c 100644
--- a/hw/nvme/ctrl.c
+++ b/hw/nvme/ctrl.c
@@ -9131,6 +9131,10 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev)
id->ieee[0] = 0xb3;
id->ieee[1] = 0x02;
id->ieee[2] = 0x00;
+ } else if (n->params.ieee_oui) {
+ id->ieee[0] = extract32(n->params.ieee_oui, 0, 8);
+ id->ieee[1] = extract32(n->params.ieee_oui, 8, 8);
+ id->ieee[2] = extract32(n->params.ieee_oui, 16, 8);
} else {
id->ieee[0] = 0x00;
id->ieee[1] = 0x54;
@@ -9384,6 +9388,24 @@ static void nvme_exit(PCIDevice *pci_dev)
memory_region_del_subregion(&n->bar0, &n->iomem);
}
+static void nvme_prop_ieee_set(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ Property *prop = opaque;
+ uint32_t *val = object_field_prop_ptr(obj, prop);
+ if (!visit_type_uint32(v, name, val, errp)) {
+ return;
+ }
+}
+
+static const PropertyInfo nvme_prop_ieee = {
+ .type = "uint32",
+ .description = "IEEE OUI: Identify Controller bytes 75:73\
+ in LE format. (e.g. ieee_oui=0xABCDEF => Byte[73]=0xEF, Byte[74]=0xCD,\
+ Byte[75]=0xAB)",
+ .set = nvme_prop_ieee_set,
+};
+
static const Property nvme_props[] = {
DEFINE_BLOCK_PROPERTIES(NvmeCtrl, namespace.blkconf),
DEFINE_PROP_LINK("pmrdev", NvmeCtrl, pmr.dev, TYPE_MEMORY_BACKEND,
@@ -9431,6 +9453,8 @@ static const Property nvme_props[] = {
DEFINE_PROP_UINT16("id_subsys_vendor", NvmeCtrl,
params.id_subsys_vendor, 0),
DEFINE_PROP_UINT16("id_subsys", NvmeCtrl, params.id_subsys, 0),
+ DEFINE_PROP("ieee_oui", NvmeCtrl, params.ieee_oui, nvme_prop_ieee,
+ uint32_t),
};
static void nvme_get_smart_warning(Object *obj, Visitor *v, const char *name,
diff --git a/hw/nvme/nvme.h b/hw/nvme/nvme.h
index 65fb168bc9..be49acaec6 100644
--- a/hw/nvme/nvme.h
+++ b/hw/nvme/nvme.h
@@ -576,6 +576,8 @@ typedef struct NvmeParams {
uint16_t id_device;
uint16_t id_subsys_vendor;
uint16_t id_subsys;
+
+ uint32_t ieee_oui;
} NvmeParams;
typedef struct NvmeCtrl {
--
2.47.3
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v4 0/2] hw/nvme: Properties for PCI vendor/dev IDs and IEEE-OUI
2025-11-27 12:02 [PATCH v4 0/2] hw/nvme: Properties for PCI vendor/dev IDs and IEEE-OUI Saif Abrar
2025-11-27 12:02 ` [PATCH v4 1/2] hw/nvme: Add properties for PCI vendor/device IDs Saif Abrar
2025-11-27 12:02 ` [PATCH v4 2/2] hw/nvme: Add property for user-specified IEEE-OUI ID Saif Abrar
@ 2025-12-12 10:00 ` Jesper Devantier
2 siblings, 0 replies; 4+ messages in thread
From: Jesper Devantier @ 2025-12-12 10:00 UTC (permalink / raw)
To: Saif Abrar, kbusch, its
Cc: qemu-block, qemu-devel, npiggin, nikhilks, stefanha, fam, philmd,
qemu-devel-bounces+qemu-devel=archiver.kernel.org
On 2025-11-27 06:02:49 -0600 -0600, Saif Abrar wrote:
> Add properties for user-specified PCI vendor/device IDs and IEEE-OUI.
> PCI properties are now set independently of each other and
> used only when use_intel_id is not set.
>
> Saif Abrar (2):
> hw/nvme: Add properties for PCI vendor/device IDs
> hw/nvme: Add property for user-specified IEEE-OUI ID
>
> hw/nvme/ctrl.c | 52 +++++++++++++++++++++++++++++++++++++++++++++++---
> hw/nvme/nvme.h | 7 +++++++
> 2 files changed, 56 insertions(+), 3 deletions(-)
>
> --
> v3 -> v4: Resolve merge commits when moving to the latest repo.
>
> 2.47.3
Reviewed-by: Jesper Wendel Devantier <foss@defmacro.it>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2025-12-12 10:02 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-11-27 12:02 [PATCH v4 0/2] hw/nvme: Properties for PCI vendor/dev IDs and IEEE-OUI Saif Abrar
2025-11-27 12:02 ` [PATCH v4 1/2] hw/nvme: Add properties for PCI vendor/device IDs Saif Abrar
2025-11-27 12:02 ` [PATCH v4 2/2] hw/nvme: Add property for user-specified IEEE-OUI ID Saif Abrar
2025-12-12 10:00 ` [PATCH v4 0/2] hw/nvme: Properties for PCI vendor/dev IDs and IEEE-OUI Jesper Devantier
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).