[PATCH v3 0/2] RISC-V: Initial support versioning of debug specification

[Alvin Chang via <qemu-devel@nongnu.org>]

This series try to support versioning of debug specification. The early debug
implementation supports debug specification v0.13, and later new trigger types
were added which are defined in debug specification v1.0 version. To support
both v0.13 and v1.0, we add 'debug-1.0' as CPU property to let user choose
debug specification v1.0 by specifying "debug-1.0=true". The default version is
still v0.13 if 'debug-1.0' is not provided and set.

For example, to enable debug specification v1.0 on max CPU:
* -cpu max,debug-1.0=true

Changes since v2:
* Improve commit message and fix typo
* Apply "Reviewed-by" tags

Changes since v1:
* Apply suggestions from Daniel. Using boolean property instead of string.

Alvin Chang (2):
  target/riscv: Add "debug-1.0" to specify debug specification v1.0
  target/riscv: Simpily support versioning of debug trigger module

 target/riscv/cpu.c                |  1 +
 target/riscv/cpu_cfg_fields.h.inc |  1 +
 target/riscv/debug.c              | 56 +++++++++++++++++++++++++++++--
 target/riscv/debug.h              |  1 +
 4 files changed, 56 insertions(+), 3 deletions(-)

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2.43.0