From: Jim MacArthur <jim.macarthur@linaro.org>
To: qemu-devel@nongnu.org
Cc: Jim MacArthur <jim.macarthur@linaro.org>
Subject: [PATCH V4 0/4] Basic ASID2 Support
Date: Tue, 2 Dec 2025 12:00:37 +0000 [thread overview]
Message-ID: <20251202120250.763150-1-jim.macarthur@linaro.org> (raw)
Added a line to the documentation mentioning that we can now support ASID2.
Changes in v4:
- Patch 3:
- Added mention of ASID2 to docs/system/arm/emulation.rst.
Jim MacArthur (4):
target/arm: Enable ID_AA64MMFR4_EL1 register.
target/arm: Allow writes to FNG1, FNG0, A2
target/arm/tcg/cpu64.c: Enable ASID2 for cpu_max
tests: Add test for ASID2 and write/read of feature bits
docs/system/arm/emulation.rst | 1 +
target/arm/cpu-features.h | 7 +++
target/arm/cpu-sysregs.h.inc | 1 +
target/arm/helper.c | 10 ++++-
target/arm/tcg/cpu64.c | 4 ++
tests/tcg/aarch64/system/asid2.c | 75 ++++++++++++++++++++++++++++++++
6 files changed, 96 insertions(+), 2 deletions(-)
create mode 100644 tests/tcg/aarch64/system/asid2.c
--
2.43.0
next reply other threads:[~2025-12-02 12:03 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-02 12:00 Jim MacArthur [this message]
2025-12-02 12:00 ` [PATCH V4 1/4] target/arm: Enable ID_AA64MMFR4_EL1 register Jim MacArthur
2025-12-02 14:28 ` Gustavo Romero
2025-12-02 12:00 ` [PATCH V4 2/4] target/arm: Allow writes to FNG1, FNG0, A2 Jim MacArthur
2025-12-02 14:29 ` Gustavo Romero
2025-12-04 16:25 ` Jim MacArthur
2025-12-02 12:00 ` [PATCH V4 3/4] target/arm/tcg/cpu64.c: Enable ASID2 for cpu_max Jim MacArthur
2025-12-02 14:29 ` Gustavo Romero
2025-12-02 12:00 ` [PATCH V4 4/4] tests: Add test for ASID2 and write/read of feature bits Jim MacArthur
2025-12-02 14:30 ` Gustavo Romero
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