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Tsirkin" , BALATON Zoltan , Mark Cave-Ayland , devel@lists.libvirt.org, Zhao Liu Subject: [RFC 09/10] target/i386: Deprecate cpuid-0xb property Date: Wed, 3 Dec 2025 01:05:01 +0800 Message-Id: <20251202170502.3228625-10-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202170502.3228625-1-zhao1.liu@intel.com> References: <20251202170502.3228625-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=192.198.163.17; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org "cpuid-0xb" was previously disabled only on PC-Q35-2.6 and PC-I440FX-2.6 machines, but PC v2.6 machines have been removed. Considerring it may have external use, so deprecate it before removal. Signed-off-by: Zhao Liu --- docs/about/deprecated.rst | 10 ++++++++++ target/i386/cpu.c | 2 +- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst index c60924b4f313..741c1a71728b 100644 --- a/docs/about/deprecated.rst +++ b/docs/about/deprecated.rst @@ -495,6 +495,16 @@ The ``fill-mtrr-mask=true`` fill the bits between 51..number-of-physical-address false only on PC-Q35-2.6 and PC-I440FX-2.6 machines, but PC v2.6 machines have been removed. Deprecate this property to stop external use. +``cpuid-0xb`` on x86 (since 11.0) +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +The ``cpuid-0xb`` is used to control whether to encode CPUID 0xB leaf or not. +Only legacy x86 CPUs didn't have 0xB leaf, and the ```level``` property can +control whether CPUID exposes the 0xB leaf and emulate legacy CPUs. This +property was previously set to false only on PC-Q35-2.6 and PC-I440FX-2.6 +machines, but PC v2.6 machines have been removed. Deprecate this property to +stop external use. + ``pmu-num=n`` on RISC-V CPUs (since 8.2) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 1f0a8cb6cec1..ef1ffc4d3d4f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -10009,7 +10009,7 @@ static const Property x86_cpu_properties[] = { DEFINE_PROP_UINT8("avx10-version", X86CPU, env.avx10_version, 0), DEFINE_PROP_UINT64("ucode-rev", X86CPU, ucode_rev, 0), DEFINE_PROP_STRING("hv-vendor-id", X86CPU, hyperv_vendor), - DEFINE_PROP_BOOL("cpuid-0xb", X86CPU, enable_cpuid_0xb, true), + DEFINE_PROP_BOOL_DEPRECATED("cpuid-0xb", X86CPU, enable_cpuid_0xb, true), DEFINE_PROP_BOOL("x-vendor-cpuid-only", X86CPU, vendor_cpuid_only, true), DEFINE_PROP_BOOL("x-vendor-cpuid-only-v2", X86CPU, vendor_cpuid_only_v2, true), DEFINE_PROP_BOOL("x-amd-topoext-features-only", X86CPU, amd_topoext_features_only, true), -- 2.34.1