From: Aditya Gupta <adityag@linux.ibm.com>
To: <qemu-devel@nongnu.org>
Cc: <qemu-ppc@nongnu.org>, Hari Bathini <hbathini@linux.ibm.com>,
Sourabh Jain <sourabhjain@linux.ibm.com>,
Harsh Prateek Bora <harshpb@linux.ibm.com>
Subject: [PATCH v2 8/9] pnv/mpipl: Enable MPIPL support
Date: Sat, 6 Dec 2025 11:26:47 +0530 [thread overview]
Message-ID: <20251206055648.1908734-9-adityag@linux.ibm.com> (raw)
In-Reply-To: <20251206055648.1908734-1-adityag@linux.ibm.com>
With all MPIPL support in place, export a "dump" node in device tree,
signifying that PowerNV QEMU platform supports MPIPL
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
---
hw/ppc/pnv.c | 37 +++++++++++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 7c36f3a00e90..8a62b0ee1074 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -54,6 +54,7 @@
#include "hw/ppc/pnv_chip.h"
#include "hw/ppc/pnv_xscom.h"
#include "hw/ppc/pnv_pnor.h"
+#include "hw/ppc/pnv_mpipl.h"
#include "hw/isa/isa.h"
#include "hw/char/serial-isa.h"
@@ -671,6 +672,39 @@ static void pnv_dt_power_mgt(PnvMachineState *pnv, void *fdt)
_FDT(fdt_setprop_cell(fdt, off, "ibm,enabled-stop-levels", 0xc0000000));
}
+static void pnv_dt_mpipl_dump(PnvMachineState *pnv, void *fdt)
+{
+ int off;
+
+ /*
+ * Add "dump" node so kernel knows MPIPL (aka fadump) is supported
+ *
+ * Note: This is only needed to be done since we are passing device tree to
+ * opal
+ *
+ * In case HDAT is supported in future, then opal can add these nodes by
+ * itself based on system attribute having MPIPL_SUPPORTED bit set
+ */
+ off = fdt_add_subnode(fdt, 0, "ibm,opal");
+ if (off == -FDT_ERR_EXISTS) {
+ off = fdt_path_offset(fdt, "/ibm,opal");
+ }
+
+ _FDT(off);
+ off = fdt_add_subnode(fdt, off, "dump");
+ _FDT(off);
+ _FDT((fdt_setprop_string(fdt, off, "compatible", "ibm,opal-dump")));
+
+ /* Add kernel and initrd as fw-load-area */
+ uint64_t fw_load_area[4] = {
+ cpu_to_be64(KERNEL_LOAD_ADDR), cpu_to_be64(KERNEL_MAX_SIZE),
+ cpu_to_be64(INITRD_LOAD_ADDR), cpu_to_be64(INITRD_MAX_SIZE)
+ };
+
+ _FDT((fdt_setprop(fdt, off, "fw-load-area",
+ fw_load_area, sizeof(fw_load_area))));
+}
+
static void *pnv_dt_create(MachineState *machine)
{
PnvMachineClass *pmc = PNV_MACHINE_GET_CLASS(machine);
@@ -733,6 +767,9 @@ static void *pnv_dt_create(MachineState *machine)
pmc->dt_power_mgt(pnv, fdt);
}
+ /* Advertise support for MPIPL */
+ pnv_dt_mpipl_dump(pnv, fdt);
+
return fdt;
}
--
2.52.0
next prev parent reply other threads:[~2025-12-06 5:59 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-06 5:56 [PATCH v2 0/9] Implement MPIPL for PowerNV Aditya Gupta
2025-12-06 5:56 ` [PATCH v2 1/9] hw/ppc: Move SBE host doorbell function to top of file Aditya Gupta
2025-12-06 5:56 ` [PATCH v2 2/9] hw/ppc: Implement S0 SBE interrupt as cpu_pause then host reset Aditya Gupta
2025-12-06 5:56 ` [PATCH v2 3/9] hw/ppc: Handle stash command in PowerNV SBE Aditya Gupta
2025-12-06 5:56 ` [PATCH v2 4/9] pnv/mpipl: Preserve memory regions as per MDST/MDDT tables Aditya Gupta
2025-12-06 5:56 ` [PATCH v2 5/9] pnv/mpipl: Preserve CPU registers after crash Aditya Gupta
2025-12-06 5:56 ` [PATCH v2 6/9] pnv/mpipl: Set thread entry size to be allocated by firmware Aditya Gupta
2025-12-06 5:56 ` [PATCH v2 7/9] pnv/mpipl: Write the preserved CPU and MDRT state Aditya Gupta
2025-12-06 5:56 ` Aditya Gupta [this message]
2025-12-06 5:56 ` [PATCH v2 9/9] tests/functional: Add test for MPIPL in PowerNV Aditya Gupta
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