From: Kane Chen via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Jamin Lin" <jamin_lin@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <troy_lee@aspeedtech.com>, Kane-Chen-AS <kane_chen@aspeedtech.com>
Subject: [PATCH v3 04/18] hw/arm/aspeed: Add AST1700 LTPI expander device model
Date: Mon, 8 Dec 2025 15:44:16 +0800 [thread overview]
Message-ID: <20251208074436.1871180-5-kane_chen@aspeedtech.com> (raw)
In-Reply-To: <20251208074436.1871180-1-kane_chen@aspeedtech.com>
From: Kane-Chen-AS <kane_chen@aspeedtech.com>
Introduce a minimal QEMU device model for the ASPEED AST1700, an
MCU-less I/O expander used in the LTPI topology defined by the
DC-SCM 2.0 specification (see figure 2):
https://www.opencompute.org/documents/ocp-dc-scm-2-0-ltpi-ver-1-0-pdf
This initial implementation includes:
* Definition of aspeed.ast1700 as a SysBusDevice
* Setup of a basic memory region to reserve I/O space for future
peripheral modeling
This stub establishes the foundation for LTPI-related device emulation,
without implementing any functional peripherals at this stage.
Signed-off-by: Kane-Chen-AS <kane_chen@aspeedtech.com>
---
include/hw/arm/aspeed_ast1700.h | 23 ++++++++++++++++
hw/arm/aspeed_ast1700.c | 48 +++++++++++++++++++++++++++++++++
hw/arm/meson.build | 1 +
3 files changed, 72 insertions(+)
create mode 100644 include/hw/arm/aspeed_ast1700.h
create mode 100644 hw/arm/aspeed_ast1700.c
diff --git a/include/hw/arm/aspeed_ast1700.h b/include/hw/arm/aspeed_ast1700.h
new file mode 100644
index 0000000000..2a95ebfe89
--- /dev/null
+++ b/include/hw/arm/aspeed_ast1700.h
@@ -0,0 +1,23 @@
+/*
+ * ASPEED AST1700 IO Expander
+ *
+ * Copyright (C) 2025 ASPEED Technology Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#ifndef ASPEED_AST1700_H
+#define ASPEED_AST1700_H
+
+#include "hw/sysbus.h"
+
+#define TYPE_ASPEED_AST1700 "aspeed.ast1700"
+
+OBJECT_DECLARE_SIMPLE_TYPE(AspeedAST1700SoCState, ASPEED_AST1700)
+
+struct AspeedAST1700SoCState {
+ SysBusDevice parent_obj;
+
+ MemoryRegion iomem;
+};
+
+#endif /* ASPEED_AST1700_H */
diff --git a/hw/arm/aspeed_ast1700.c b/hw/arm/aspeed_ast1700.c
new file mode 100644
index 0000000000..f564b9b242
--- /dev/null
+++ b/hw/arm/aspeed_ast1700.c
@@ -0,0 +1,48 @@
+/*
+ * ASPEED AST1700 IO Expander
+ *
+ * Copyright (C) 2025 ASPEED Technology Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "hw/boards.h"
+#include "hw/qdev-core.h"
+#include "qom/object.h"
+#include "hw/arm/aspeed_ast1700.h"
+
+#define AST2700_SOC_LTPI_SIZE 0x01000000
+
+static void aspeed_ast1700_realize(DeviceState *dev, Error **errp)
+{
+ AspeedAST1700SoCState *s = ASPEED_AST1700(dev);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+
+ /* Occupy memory space for all controllers in AST1700 */
+ memory_region_init(&s->iomem, OBJECT(s), TYPE_ASPEED_AST1700,
+ AST2700_SOC_LTPI_SIZE);
+ sysbus_init_mmio(sbd, &s->iomem);
+}
+
+static void aspeed_ast1700_class_init(ObjectClass *klass, const void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->realize = aspeed_ast1700_realize;
+}
+
+static const TypeInfo aspeed_ast1700_info = {
+ .name = TYPE_ASPEED_AST1700,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedAST1700SoCState),
+ .class_init = aspeed_ast1700_class_init,
+ .abstract = false,
+};
+
+static void aspeed_ast1700_register_types(void)
+{
+ type_register_static(&aspeed_ast1700_info);
+}
+
+type_init(aspeed_ast1700_register_types);
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index aeaf654790..ee26a05dc9 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -42,6 +42,7 @@ arm_common_ss.add(when: 'CONFIG_FSL_IMX31', if_true: files('fsl-imx31.c', 'kzm.c
arm_common_ss.add(when: 'CONFIG_FSL_IMX6', if_true: files('fsl-imx6.c'))
arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed.c',
+ 'aspeed_ast1700.c',
'aspeed_soc_common.c',
'aspeed_ast2400.c',
'aspeed_ast2400_palmetto.c',
--
2.43.0
next prev parent reply other threads:[~2025-12-08 7:45 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-08 7:44 [PATCH v3 00/18] hw/arm/aspeed: AST1700 LTPI support and device hookups Kane Chen via
2025-12-08 7:44 ` [PATCH v3 01/18] hw/misc: Add LTPI controller Kane Chen via
2025-12-10 23:00 ` Nabih Estefan
2025-12-08 7:44 ` [PATCH v3 02/18] hw/arm/aspeed: Attach LTPI controller to AST27X0 platform Kane Chen via
2025-12-10 23:00 ` Nabih Estefan
2025-12-08 7:44 ` [PATCH v3 03/18] hw/misc: Add basic Aspeed PWM model Kane Chen via
2025-12-10 23:00 ` Nabih Estefan
2025-12-08 7:44 ` Kane Chen via [this message]
2025-12-08 7:44 ` [PATCH v3 05/18] hw/arm/aspeed: Integrate AST1700 device into AST27X0 Kane Chen via
2025-12-08 7:44 ` [PATCH v3 06/18] hw/arm/aspeed: Integrate interrupt controller for AST1700 Kane Chen via
2025-12-08 21:03 ` Nabih Estefan
2025-12-09 2:08 ` Kane Chen
2025-12-09 8:47 ` Cédric Le Goater
2025-12-08 7:44 ` [PATCH v3 07/18] hw/arm/aspeed: Attach LTPI controller to AST1700 model Kane Chen via
2025-12-08 7:44 ` [PATCH v3 08/18] hw/arm/aspeed: Attach UART device " Kane Chen via
2025-12-08 7:44 ` [PATCH v3 09/18] hw/arm/aspeed: Attach SRAM " Kane Chen via
2025-12-08 7:44 ` [PATCH v3 10/18] hw/arm/aspeed: Attach SPI " Kane Chen via
2025-12-08 7:44 ` [PATCH v3 11/18] hw/arm/aspeed: Attach ADC " Kane Chen via
2025-12-08 7:44 ` [PATCH v3 12/18] hw/arm/aspeed: Attach SCU " Kane Chen via
2025-12-08 7:44 ` [PATCH v3 13/18] hw/arm/aspeed: Attach GPIO " Kane Chen via
2025-12-08 7:44 ` [PATCH v3 14/18] hw/arm/aspeed: attach I2C " Kane Chen via
2025-12-10 23:01 ` Nabih Estefan
2025-12-08 7:44 ` [PATCH v3 15/18] hw/arm/aspeed: Attach WDT " Kane Chen via
2025-12-08 7:44 ` [PATCH v3 16/18] hw/arm/aspeed: Attach PWM " Kane Chen via
2025-12-08 7:44 ` [PATCH v3 17/18] hw/arm/aspeed: Attach SGPIOM " Kane Chen via
2025-12-08 18:21 ` Nabih Estefan
2025-12-09 8:49 ` Cédric Le Goater
2025-12-09 10:17 ` Kane Chen
2025-12-10 2:41 ` Jamin Lin
2025-12-08 7:44 ` [PATCH v3 18/18] hw/arm/aspeed: Model AST1700 I3C block as unimplemented device Kane Chen via
2025-12-08 18:23 ` Nabih Estefan
2025-12-09 8:51 ` Cédric Le Goater
2025-12-10 23:01 ` [PATCH v3 00/18] hw/arm/aspeed: AST1700 LTPI support and device hookups Nabih Estefan
2025-12-11 6:42 ` Kane Chen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20251208074436.1871180-5-kane_chen@aspeedtech.com \
--to=qemu-devel@nongnu.org \
--cc=andrew@codeconstruct.com.au \
--cc=clg@kaod.org \
--cc=jamin_lin@aspeedtech.com \
--cc=joel@jms.id.au \
--cc=kane_chen@aspeedtech.com \
--cc=leetroy@gmail.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=steven_lee@aspeedtech.com \
--cc=troy_lee@aspeedtech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).