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From: Anton Johansson via <qemu-devel@nongnu.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PATCH 2/7] target/hppa: Define PA[20|1X] physical address space size
Date: Tue, 09 Dec 2025 14:56:03 +0100	[thread overview]
Message-ID: <20251209-phys_addr-v1-2-c387f3e72d77@rev.ng> (raw)
In-Reply-To: <20251209-phys_addr-v1-0-c387f3e72d77@rev.ng>

When converting virtual to physical addresses,
TARGET_PHYS_ADDR_SPACE_BITS is used under PA-RISC 2.0, and an explicit
cast to uint32_t is used under PA-RISC 1.X.  Replace the former with a
more specific macro limited to mem_helper.c, and make the latter
conversion explicit by defining the size of the physical address space
for PA-RISC 1.X.

Signed-off-by: Anton Johansson <anjo@rev.ng>
---
 target/hppa/mem_helper.c | 23 ++++++++++++++++++-----
 1 file changed, 18 insertions(+), 5 deletions(-)

diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
index cce82e6599..8563bb0e2a 100644
--- a/target/hppa/mem_helper.c
+++ b/target/hppa/mem_helper.c
@@ -29,6 +29,19 @@
 #include "hw/core/cpu.h"
 #include "trace.h"
 
+/*
+ * 64-bit (PA-RISC 2.0) machines are assumed to run PA-8700, and 32-bit
+ * machines 7300LC.  This gives 44 and 32 bits of physical address space
+ * respectively.
+ *
+ *   CPU model        Physical address space bits
+ *   PA-7000--7300LC  32
+ *   PA-8000--8600    40
+ *   PA-8700--8900    44
+ */
+#define HPPA_PHYS_ADDR_SPACE_BITS_PA20 44
+#define HPPA_PHYS_ADDR_SPACE_BITS_PA1X 32
+
 hwaddr hppa_abs_to_phys_pa2_w1(vaddr addr)
 {
     /*
@@ -42,8 +55,8 @@ hwaddr hppa_abs_to_phys_pa2_w1(vaddr addr)
      * Since the supported physical address space is below 54 bits, the
      * H-8 algorithm is moot and all that is left is to truncate.
      */
-    QEMU_BUILD_BUG_ON(TARGET_PHYS_ADDR_SPACE_BITS > 54);
-    return sextract64(addr, 0, TARGET_PHYS_ADDR_SPACE_BITS);
+    QEMU_BUILD_BUG_ON(HPPA_PHYS_ADDR_SPACE_BITS_PA20 > 54);
+    return sextract64(addr, 0, HPPA_PHYS_ADDR_SPACE_BITS_PA20);
 }
 
 hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr)
@@ -67,7 +80,7 @@ hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr)
          * is what can be seen on physical machines too.
          */
         addr = (uint32_t)addr;
-        addr |= -1ull << (TARGET_PHYS_ADDR_SPACE_BITS - 4);
+        addr |= -1ull << (HPPA_PHYS_ADDR_SPACE_BITS_PA20 - 4);
     }
     return addr;
 }
@@ -217,7 +230,7 @@ int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,
             if (hppa_is_pa20(env)) {
                 phys = hppa_abs_to_phys_pa2_w0(addr);
             } else {
-                phys = (uint32_t)addr;
+                phys = extract64(addr, 0, HPPA_PHYS_ADDR_SPACE_BITS_PA1X);
             }
             break;
         default:
@@ -558,7 +571,7 @@ static void itlbt_pa20(CPUHPPAState *env, target_ulong r1,
     /* Align per the page size. */
     ent->pa &= TARGET_PAGE_MASK << mask_shift;
     /* Ignore the bits beyond physical address space. */
-    ent->pa = sextract64(ent->pa, 0, TARGET_PHYS_ADDR_SPACE_BITS);
+    ent->pa = sextract64(ent->pa, 0, HPPA_PHYS_ADDR_SPACE_BITS_PA20);
 
     ent->t = extract64(r2, 61, 1);
     ent->d = extract64(r2, 60, 1);

-- 
2.51.0



  parent reply	other threads:[~2025-12-09 13:54 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-09 13:56 [PATCH 0/7] single-binary: Drop TARGET_PHYS_ADDR_SPACE_BITS Anton Johansson via
2025-12-09 13:56 ` [PATCH 1/7] target/alpha: Introduce alpha_phys_addr_space_bits() Anton Johansson via
2025-12-11 15:09   ` Richard Henderson
2025-12-09 13:56 ` Anton Johansson via [this message]
2025-12-11 15:16   ` [PATCH 2/7] target/hppa: Define PA[20|1X] physical address space size Richard Henderson
2025-12-09 13:56 ` [PATCH 3/7] target/i386: Drop physical address range checks Anton Johansson via
2025-12-09 13:56 ` [PATCH 4/7] target/loongarch: Introduce loongarch_palen_mask() Anton Johansson via
2025-12-09 13:56 ` [PATCH 5/7] hw/loongarch: Use loongarch_palen_mask() Anton Johansson via
2025-12-09 13:56 ` [PATCH 6/7] hw/riscv: Fix IOMMU PAS capability to 56 bits Anton Johansson via
2025-12-09 13:56 ` [PATCH 7/7] Drop TARGET_PHYS_ADDR_SPACE_BITS Anton Johansson via
2025-12-09 16:07   ` Brian Cain
2025-12-11 15:18   ` Richard Henderson

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