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From: Anton Johansson via <qemu-devel@nongnu.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PATCH 3/7] target/i386: Drop physical address range checks
Date: Tue, 09 Dec 2025 14:56:04 +0100	[thread overview]
Message-ID: <20251209-phys_addr-v1-3-c387f3e72d77@rev.ng> (raw)
In-Reply-To: <20251209-phys_addr-v1-0-c387f3e72d77@rev.ng>

Since TARGET_PHYS_ADDR_SPACE_BITS is now fixed to 64 bits for all
targets we can remove range checks on cpu->phys_bits and
TCG_PHYS_ADDR_BITS.

Signed-off-by: Anton Johansson <anjo@rev.ng>
---
 target/i386/tcg/helper-tcg.h | 2 --
 target/i386/cpu.c            | 9 +++------
 target/i386/kvm/kvm.c        | 3 +--
 3 files changed, 4 insertions(+), 10 deletions(-)

diff --git a/target/i386/tcg/helper-tcg.h b/target/i386/tcg/helper-tcg.h
index e41cbda407..f4b2ff740d 100644
--- a/target/i386/tcg/helper-tcg.h
+++ b/target/i386/tcg/helper-tcg.h
@@ -31,8 +31,6 @@
 # define TCG_PHYS_ADDR_BITS 36
 #endif
 
-QEMU_BUILD_BUG_ON(TCG_PHYS_ADDR_BITS > TARGET_PHYS_ADDR_SPACE_BITS);
-
 /**
  * x86_cpu_do_interrupt:
  * @cpu: vCPU the interrupt is to be handled by.
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 6417775786..0eeceed7cd 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -9435,12 +9435,9 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
      * accel-specific code in cpu_exec_realizefn.
      */
     if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) {
-        if (cpu->phys_bits &&
-            (cpu->phys_bits > TARGET_PHYS_ADDR_SPACE_BITS ||
-            cpu->phys_bits < 32)) {
-            error_setg(errp, "phys-bits should be between 32 and %u "
-                             " (but is %u)",
-                             TARGET_PHYS_ADDR_SPACE_BITS, cpu->phys_bits);
+        if (cpu->phys_bits && cpu->phys_bits < 32) {
+            error_setg(errp, "phys-bits should be at least 32"
+                             " (but is %u)", cpu->phys_bits);
             return;
         }
         /*
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index 60c7981138..edfff01d64 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -4681,8 +4681,7 @@ static int kvm_get_msrs(X86CPU *cpu)
      */
 
     if (cpu->fill_mtrr_mask) {
-        QEMU_BUILD_BUG_ON(TARGET_PHYS_ADDR_SPACE_BITS > 52);
-        assert(cpu->phys_bits <= TARGET_PHYS_ADDR_SPACE_BITS);
+        assert(cpu->phys_bits <= 52);
         mtrr_top_bits = MAKE_64BIT_MASK(cpu->phys_bits, 52 - cpu->phys_bits);
     } else {
         mtrr_top_bits = 0;

-- 
2.51.0



  parent reply	other threads:[~2025-12-09 13:54 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-09 13:56 [PATCH 0/7] single-binary: Drop TARGET_PHYS_ADDR_SPACE_BITS Anton Johansson via
2025-12-09 13:56 ` [PATCH 1/7] target/alpha: Introduce alpha_phys_addr_space_bits() Anton Johansson via
2025-12-11 15:09   ` Richard Henderson
2025-12-09 13:56 ` [PATCH 2/7] target/hppa: Define PA[20|1X] physical address space size Anton Johansson via
2025-12-11 15:16   ` Richard Henderson
2025-12-09 13:56 ` Anton Johansson via [this message]
2025-12-09 13:56 ` [PATCH 4/7] target/loongarch: Introduce loongarch_palen_mask() Anton Johansson via
2025-12-09 13:56 ` [PATCH 5/7] hw/loongarch: Use loongarch_palen_mask() Anton Johansson via
2025-12-09 13:56 ` [PATCH 6/7] hw/riscv: Fix IOMMU PAS capability to 56 bits Anton Johansson via
2025-12-09 13:56 ` [PATCH 7/7] Drop TARGET_PHYS_ADDR_SPACE_BITS Anton Johansson via
2025-12-09 16:07   ` Brian Cain
2025-12-11 15:18   ` Richard Henderson

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