From: Anton Johansson via <qemu-devel@nongnu.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PATCH 7/7] Drop TARGET_PHYS_ADDR_SPACE_BITS
Date: Tue, 09 Dec 2025 14:56:08 +0100 [thread overview]
Message-ID: <20251209-phys_addr-v1-7-c387f3e72d77@rev.ng> (raw)
In-Reply-To: <20251209-phys_addr-v1-0-c387f3e72d77@rev.ng>
The macro is no longer in use and can safely be dropped.
Signed-off-by: Anton Johansson <anjo@rev.ng>
---
include/exec/cpu-defs.h | 3 ---
include/exec/poison.h | 2 --
target/alpha/cpu-param.h | 3 ---
target/arm/cpu-param.h | 2 --
target/avr/cpu-param.h | 1 -
target/hexagon/cpu-param.h | 1 -
target/hppa/cpu-param.h | 2 --
target/i386/cpu-param.h | 2 --
target/loongarch/cpu-param.h | 1 -
target/m68k/cpu-param.h | 1 -
target/microblaze/cpu-param.h | 2 --
target/mips/cpu-param.h | 2 --
target/openrisc/cpu-param.h | 1 -
target/ppc/cpu-param.h | 7 -------
target/riscv/cpu-param.h | 2 --
target/rx/cpu-param.h | 1 -
target/s390x/cpu-param.h | 1 -
target/sh4/cpu-param.h | 1 -
target/sparc/cpu-param.h | 2 --
target/tricore/cpu-param.h | 1 -
target/xtensa/cpu-param.h | 1 -
21 files changed, 39 deletions(-)
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index e01acb7c90..141b5a9929 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -28,9 +28,6 @@
#ifndef TARGET_LONG_BITS
# error TARGET_LONG_BITS must be defined in cpu-param.h
#endif
-#ifndef TARGET_PHYS_ADDR_SPACE_BITS
-# error TARGET_PHYS_ADDR_SPACE_BITS must be defined in cpu-param.h
-#endif
#ifndef TARGET_VIRT_ADDR_SPACE_BITS
# error TARGET_VIRT_ADDR_SPACE_BITS must be defined in cpu-param.h
#endif
diff --git a/include/exec/poison.h b/include/exec/poison.h
index a779adbb7a..2caf2d92f1 100644
--- a/include/exec/poison.h
+++ b/include/exec/poison.h
@@ -43,8 +43,6 @@
#pragma GCC poison TARGET_FMT_ld
#pragma GCC poison TARGET_FMT_lu
-#pragma GCC poison TARGET_PHYS_ADDR_SPACE_BITS
-
#pragma GCC poison CONFIG_ALPHA_DIS
#pragma GCC poison CONFIG_HPPA_DIS
#pragma GCC poison CONFIG_I386_DIS
diff --git a/target/alpha/cpu-param.h b/target/alpha/cpu-param.h
index a799f42db3..e04bfeee12 100644
--- a/target/alpha/cpu-param.h
+++ b/target/alpha/cpu-param.h
@@ -8,9 +8,6 @@
#ifndef ALPHA_CPU_PARAM_H
#define ALPHA_CPU_PARAM_H
-/* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44. */
-#define TARGET_PHYS_ADDR_SPACE_BITS 44
-
#ifdef CONFIG_USER_ONLY
/*
* Allow user-only to vary page size. Real hardware allows only 8k and 64k,
diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h
index 8b46c7c570..08785125ad 100644
--- a/target/arm/cpu-param.h
+++ b/target/arm/cpu-param.h
@@ -9,10 +9,8 @@
#define ARM_CPU_PARAM_H
#ifdef TARGET_AARCH64
-# define TARGET_PHYS_ADDR_SPACE_BITS 52
# define TARGET_VIRT_ADDR_SPACE_BITS 52
#else
-# define TARGET_PHYS_ADDR_SPACE_BITS 40
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
diff --git a/target/avr/cpu-param.h b/target/avr/cpu-param.h
index f74bfc2580..066ada1e9c 100644
--- a/target/avr/cpu-param.h
+++ b/target/avr/cpu-param.h
@@ -22,7 +22,6 @@
#define AVR_CPU_PARAM_H
#define TARGET_PAGE_BITS 10
-#define TARGET_PHYS_ADDR_SPACE_BITS 24
#define TARGET_VIRT_ADDR_SPACE_BITS 24
#define TARGET_INSN_START_EXTRA_WORDS 0
diff --git a/target/hexagon/cpu-param.h b/target/hexagon/cpu-param.h
index 635d509e74..31da1a239f 100644
--- a/target/hexagon/cpu-param.h
+++ b/target/hexagon/cpu-param.h
@@ -20,7 +20,6 @@
#define TARGET_PAGE_BITS 16 /* 64K pages */
-#define TARGET_PHYS_ADDR_SPACE_BITS 36
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#define TARGET_INSN_START_EXTRA_WORDS 0
diff --git a/target/hppa/cpu-param.h b/target/hppa/cpu-param.h
index 9bf7ac76d0..8e33d1ac36 100644
--- a/target/hppa/cpu-param.h
+++ b/target/hppa/cpu-param.h
@@ -9,11 +9,9 @@
#define HPPA_CPU_PARAM_H
#if defined(CONFIG_USER_ONLY) && defined(TARGET_ABI32)
-# define TARGET_PHYS_ADDR_SPACE_BITS 32
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#else
/* ??? PA-8000 through 8600 have 40 bits; PA-8700 and 8900 have 44 bits. */
-# define TARGET_PHYS_ADDR_SPACE_BITS 40
# define TARGET_VIRT_ADDR_SPACE_BITS 64
#endif
diff --git a/target/i386/cpu-param.h b/target/i386/cpu-param.h
index ebb844bcc8..9e4cb74e04 100644
--- a/target/i386/cpu-param.h
+++ b/target/i386/cpu-param.h
@@ -9,7 +9,6 @@
#define I386_CPU_PARAM_H
#ifdef TARGET_X86_64
-# define TARGET_PHYS_ADDR_SPACE_BITS 52
/*
* ??? This is really 48 bits, sign-extended, but the only thing
* accessible to userland with bit 48 set is the VSYSCALL, and that
@@ -17,7 +16,6 @@
*/
# define TARGET_VIRT_ADDR_SPACE_BITS 47
#else
-# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
#define TARGET_PAGE_BITS 12
diff --git a/target/loongarch/cpu-param.h b/target/loongarch/cpu-param.h
index 58cc45a377..7779461054 100644
--- a/target/loongarch/cpu-param.h
+++ b/target/loongarch/cpu-param.h
@@ -8,7 +8,6 @@
#ifndef LOONGARCH_CPU_PARAM_H
#define LOONGARCH_CPU_PARAM_H
-#define TARGET_PHYS_ADDR_SPACE_BITS 48
#define TARGET_VIRT_ADDR_SPACE_BITS 48
#define TARGET_PAGE_BITS 12
diff --git a/target/m68k/cpu-param.h b/target/m68k/cpu-param.h
index 256a2b5f8b..802d8fc674 100644
--- a/target/m68k/cpu-param.h
+++ b/target/m68k/cpu-param.h
@@ -14,7 +14,6 @@
* use the smallest one
*/
#define TARGET_PAGE_BITS 12
-#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#define TARGET_INSN_START_EXTRA_WORDS 1
diff --git a/target/microblaze/cpu-param.h b/target/microblaze/cpu-param.h
index e0a3794513..90a0cf2435 100644
--- a/target/microblaze/cpu-param.h
+++ b/target/microblaze/cpu-param.h
@@ -17,10 +17,8 @@
* of address space.
*/
#ifdef CONFIG_USER_ONLY
-#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#else
-#define TARGET_PHYS_ADDR_SPACE_BITS 64
#define TARGET_VIRT_ADDR_SPACE_BITS 64
#endif
diff --git a/target/mips/cpu-param.h b/target/mips/cpu-param.h
index 58f450827f..d62110e732 100644
--- a/target/mips/cpu-param.h
+++ b/target/mips/cpu-param.h
@@ -8,10 +8,8 @@
#define MIPS_CPU_PARAM_H
#ifdef TARGET_ABI_MIPSN64
-#define TARGET_PHYS_ADDR_SPACE_BITS 48
#define TARGET_VIRT_ADDR_SPACE_BITS 48
#else
-#define TARGET_PHYS_ADDR_SPACE_BITS 40
# ifdef CONFIG_USER_ONLY
# define TARGET_VIRT_ADDR_SPACE_BITS 31
# else
diff --git a/target/openrisc/cpu-param.h b/target/openrisc/cpu-param.h
index b4f57bbe69..740cf76ddd 100644
--- a/target/openrisc/cpu-param.h
+++ b/target/openrisc/cpu-param.h
@@ -9,7 +9,6 @@
#define OPENRISC_CPU_PARAM_H
#define TARGET_PAGE_BITS 13
-#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#define TARGET_INSN_START_EXTRA_WORDS 1
diff --git a/target/ppc/cpu-param.h b/target/ppc/cpu-param.h
index e4ed9080ee..2065915dc5 100644
--- a/target/ppc/cpu-param.h
+++ b/target/ppc/cpu-param.h
@@ -9,12 +9,6 @@
#define PPC_CPU_PARAM_H
#ifdef TARGET_PPC64
-/*
- * Note that the official physical address space bits is 62-M where M
- * is implementation dependent. I've not looked up M for the set of
- * cpus we emulate at the system level.
- */
-#define TARGET_PHYS_ADDR_SPACE_BITS 62
/*
* Note that the PPC environment architecture talks about 80 bit virtual
* addresses, with segmentation. Obviously that's not all visible to a
@@ -26,7 +20,6 @@
# define TARGET_VIRT_ADDR_SPACE_BITS 64
# endif
#else
-# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
diff --git a/target/riscv/cpu-param.h b/target/riscv/cpu-param.h
index cfdc67c258..b96e1ce12e 100644
--- a/target/riscv/cpu-param.h
+++ b/target/riscv/cpu-param.h
@@ -9,10 +9,8 @@
#define RISCV_CPU_PARAM_H
#if defined(TARGET_RISCV64)
-# define TARGET_PHYS_ADDR_SPACE_BITS 56 /* 44-bit PPN */
# define TARGET_VIRT_ADDR_SPACE_BITS 48 /* sv48 */
#elif defined(TARGET_RISCV32)
-# define TARGET_PHYS_ADDR_SPACE_BITS 34 /* 22-bit PPN */
# define TARGET_VIRT_ADDR_SPACE_BITS 32 /* sv32 */
#endif
#define TARGET_PAGE_BITS 12 /* 4 KiB Pages */
diff --git a/target/rx/cpu-param.h b/target/rx/cpu-param.h
index 84934f3bca..4cf6183aa0 100644
--- a/target/rx/cpu-param.h
+++ b/target/rx/cpu-param.h
@@ -21,7 +21,6 @@
#define TARGET_PAGE_BITS 12
-#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#define TARGET_INSN_START_EXTRA_WORDS 0
diff --git a/target/s390x/cpu-param.h b/target/s390x/cpu-param.h
index abfae3bedf..e46e0757c6 100644
--- a/target/s390x/cpu-param.h
+++ b/target/s390x/cpu-param.h
@@ -9,7 +9,6 @@
#define S390_CPU_PARAM_H
#define TARGET_PAGE_BITS 12
-#define TARGET_PHYS_ADDR_SPACE_BITS 64
#define TARGET_VIRT_ADDR_SPACE_BITS 64
#define TARGET_INSN_START_EXTRA_WORDS 2
diff --git a/target/sh4/cpu-param.h b/target/sh4/cpu-param.h
index f328715ee8..e2632bb20f 100644
--- a/target/sh4/cpu-param.h
+++ b/target/sh4/cpu-param.h
@@ -9,7 +9,6 @@
#define SH4_CPU_PARAM_H
#define TARGET_PAGE_BITS 12 /* 4k */
-#define TARGET_PHYS_ADDR_SPACE_BITS 32
#ifdef CONFIG_USER_ONLY
# define TARGET_VIRT_ADDR_SPACE_BITS 31
#else
diff --git a/target/sparc/cpu-param.h b/target/sparc/cpu-param.h
index 45eea9d6ba..4c92862ea3 100644
--- a/target/sparc/cpu-param.h
+++ b/target/sparc/cpu-param.h
@@ -9,7 +9,6 @@
#ifdef TARGET_SPARC64
# define TARGET_PAGE_BITS 13 /* 8k */
-# define TARGET_PHYS_ADDR_SPACE_BITS 41
# ifdef TARGET_ABI32
# define TARGET_VIRT_ADDR_SPACE_BITS 32
# else
@@ -17,7 +16,6 @@
# endif
#else
# define TARGET_PAGE_BITS 12 /* 4k */
-# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
diff --git a/target/tricore/cpu-param.h b/target/tricore/cpu-param.h
index eb33a67c41..f260a888c2 100644
--- a/target/tricore/cpu-param.h
+++ b/target/tricore/cpu-param.h
@@ -9,7 +9,6 @@
#define TRICORE_CPU_PARAM_H
#define TARGET_PAGE_BITS 14
-#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#define TARGET_INSN_START_EXTRA_WORDS 0
diff --git a/target/xtensa/cpu-param.h b/target/xtensa/cpu-param.h
index 7a0c22c900..328176281e 100644
--- a/target/xtensa/cpu-param.h
+++ b/target/xtensa/cpu-param.h
@@ -9,7 +9,6 @@
#define XTENSA_CPU_PARAM_H
#define TARGET_PAGE_BITS 12
-#define TARGET_PHYS_ADDR_SPACE_BITS 32
#ifdef CONFIG_USER_ONLY
#define TARGET_VIRT_ADDR_SPACE_BITS 30
#else
--
2.51.0
next prev parent reply other threads:[~2025-12-09 13:54 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-09 13:56 [PATCH 0/7] single-binary: Drop TARGET_PHYS_ADDR_SPACE_BITS Anton Johansson via
2025-12-09 13:56 ` [PATCH 1/7] target/alpha: Introduce alpha_phys_addr_space_bits() Anton Johansson via
2025-12-11 15:09 ` Richard Henderson
2025-12-09 13:56 ` [PATCH 2/7] target/hppa: Define PA[20|1X] physical address space size Anton Johansson via
2025-12-11 15:16 ` Richard Henderson
2025-12-09 13:56 ` [PATCH 3/7] target/i386: Drop physical address range checks Anton Johansson via
2025-12-09 13:56 ` [PATCH 4/7] target/loongarch: Introduce loongarch_palen_mask() Anton Johansson via
2025-12-09 13:56 ` [PATCH 5/7] hw/loongarch: Use loongarch_palen_mask() Anton Johansson via
2025-12-09 13:56 ` [PATCH 6/7] hw/riscv: Fix IOMMU PAS capability to 56 bits Anton Johansson via
2025-12-09 13:56 ` Anton Johansson via [this message]
2025-12-09 16:07 ` [PATCH 7/7] Drop TARGET_PHYS_ADDR_SPACE_BITS Brian Cain
2025-12-11 15:18 ` Richard Henderson
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