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Tue, 09 Dec 2025 08:28:31 -0800 (PST) Received: from draig.lan ([185.126.160.19]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-42f7d331aeasm32218092f8f.37.2025.12.09.08.28.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Dec 2025 08:28:30 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id F1B2E5F87D; Tue, 09 Dec 2025 16:28:29 +0000 (GMT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Christian Stussak , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Alexander Graf , Mads Ynddal , Peter Maydell , qemu-arm@nongnu.org (open list:ARM TCG CPUs) Subject: [PULL 2/4] target/arm: ensure PSCI register updates are flushed Date: Tue, 9 Dec 2025 16:28:27 +0000 Message-ID: <20251209162829.1328559-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251209162829.1328559-1-alex.bennee@linaro.org> References: <20251209162829.1328559-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org When we handle a host call we report state back to the caller via registers. Set vcpu_dirty to indicate QEMU is currently the reference and hoist the flush_cpu_state() and make the call unconditional. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3228 Tested-by: Christian Stussak Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20251209092459.1058313-3-alex.bennee@linaro.org> Signed-off-by: Alex Bennée diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 70d34063df8..8e2940217a6 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1942,6 +1942,7 @@ static int hvf_handle_exception(CPUState *cpu, hv_vcpu_exit_exception_t *excp) /* SMCCC 1.3 section 5.2 says every unknown SMCCC call returns -1 */ env->xregs[0] = -1; } + cpu->vcpu_dirty = true; } else { trace_hvf_unknown_hvc(env->pc, env->xregs[0]); hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized(), 1); @@ -1958,6 +1959,7 @@ static int hvf_handle_exception(CPUState *cpu, hv_vcpu_exit_exception_t *excp) /* SMCCC 1.3 section 5.2 says every unknown SMCCC call returns -1 */ env->xregs[0] = -1; } + cpu->vcpu_dirty = true; } else { trace_hvf_unknown_smc(env->xregs[0]); hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized(), 1); @@ -1980,10 +1982,12 @@ static int hvf_handle_exception(CPUState *cpu, hv_vcpu_exit_exception_t *excp) error_report("0x%llx: unhandled exception ec=0x%x", env->pc, ec); } + /* flush any changed cpu state back to HVF */ + flush_cpu_state(cpu); + if (advance_pc) { uint64_t pc; - flush_cpu_state(cpu); r = hv_vcpu_get_reg(cpu->accel->fd, HV_REG_PC, &pc); assert_hvf_ok(r); -- 2.47.3