From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BE7F2D3E793 for ; Thu, 11 Dec 2025 05:45:32 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vTZUE-0004mm-3B; Thu, 11 Dec 2025 00:45:13 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vTZU2-0004Xv-Gk for qemu-devel@nongnu.org; Thu, 11 Dec 2025 00:44:58 -0500 Received: from mgamail.intel.com ([192.198.163.19]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vTZU0-0001fx-Si for qemu-devel@nongnu.org; Thu, 11 Dec 2025 00:44:58 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1765431897; x=1796967897; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=66V7PYFxiVOdYw2D3BJVJJrWu9A0DxDp2SevYe43bMs=; b=mCg0ZM23+cI+Ls8wrsloNZeKX8U0+Yq25ZAF0aO3uPIegCuZ6mWYHlkz x3Q/TwUBC86HIaxf3oGWaN8bdigtjn4lKjNToO8BPVuNW9+uAbJId4095 ZDJhJ2xC3hkWC3oyWvbhsHwdu/dvLv+0sO2XqQNk5PFR7yMIUlYUrdTmH rz3OQEIceM9CE1U+Dg0Xyvjiov3MJYo7qQplB28ahOugWg7TKCI62zy/z zLXZYERAUdmxmS9x80+6G4qvDFXcmcooR8+fxc2s+YCbEQ6zcP2NiNq02 fAdWYaoTk9lsiBgTk9BMKGT8BVwH3YZJupmLJrIrvh8ZeFSvlu1X92jEr w==; X-CSE-ConnectionGUID: PUwwd5fPREW042ZPx2oIPw== X-CSE-MsgGUID: tsNgyZQIR8ymJYv+9WlmcQ== X-IronPort-AV: E=McAfee;i="6800,10657,11638"; a="66410007" X-IronPort-AV: E=Sophos;i="6.20,265,1758610800"; d="scan'208";a="66410007" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Dec 2025 21:44:44 -0800 X-CSE-ConnectionGUID: nIgW2W65SVa9JIbke47dJw== X-CSE-MsgGUID: C7AtQXv+TOe0QXht/vYLUg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.20,265,1758610800"; d="scan'208";a="227366244" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.39]) by orviesa002.jf.intel.com with ESMTP; 10 Dec 2025 21:44:40 -0800 From: Zhao Liu To: Paolo Bonzini , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Chao Gao , Xin Li , John Allen , Babu Moger , Mathias Krause , Dapeng Mi , Zide Chen , Xiaoyao Li , Chenyi Qiang , Farrah Chen , Zhao Liu Subject: [PATCH v5 21/22] i386/tdx: Fix missing spaces in tdx_xfam_deps[] Date: Thu, 11 Dec 2025 14:08:00 +0800 Message-Id: <20251211060801.3600039-22-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251211060801.3600039-1-zhao1.liu@intel.com> References: <20251211060801.3600039-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=192.198.163.19; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, UPPERCASE_50_75=0.008 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The checkpatch.pl always complains: "ERROR: space required after that close brace '}'". Fix this issue. Tested-by: Farrah Chen Reviewed-by: Xiaoyao Li Signed-off-by: Zhao Liu --- target/i386/kvm/tdx.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c index dbf0fa2c9180..a3444623657f 100644 --- a/target/i386/kvm/tdx.c +++ b/target/i386/kvm/tdx.c @@ -520,15 +520,15 @@ typedef struct TdxXFAMDep { * supported. */ TdxXFAMDep tdx_xfam_deps[] = { - { XSTATE_YMM_BIT, { FEAT_1_ECX, CPUID_EXT_FMA }}, - { XSTATE_YMM_BIT, { FEAT_7_0_EBX, CPUID_7_0_EBX_AVX2 }}, - { XSTATE_OPMASK_BIT, { FEAT_7_0_ECX, CPUID_7_0_ECX_AVX512_VBMI}}, - { XSTATE_OPMASK_BIT, { FEAT_7_0_EDX, CPUID_7_0_EDX_AVX512_FP16}}, - { XSTATE_PT_BIT, { FEAT_7_0_EBX, CPUID_7_0_EBX_INTEL_PT}}, - { XSTATE_PKRU_BIT, { FEAT_7_0_ECX, CPUID_7_0_ECX_PKU}}, - { XSTATE_XTILE_CFG_BIT, { FEAT_7_0_EDX, CPUID_7_0_EDX_AMX_BF16 }}, - { XSTATE_XTILE_CFG_BIT, { FEAT_7_0_EDX, CPUID_7_0_EDX_AMX_TILE }}, - { XSTATE_XTILE_CFG_BIT, { FEAT_7_0_EDX, CPUID_7_0_EDX_AMX_INT8 }}, + { XSTATE_YMM_BIT, { FEAT_1_ECX, CPUID_EXT_FMA } }, + { XSTATE_YMM_BIT, { FEAT_7_0_EBX, CPUID_7_0_EBX_AVX2 } }, + { XSTATE_OPMASK_BIT, { FEAT_7_0_ECX, CPUID_7_0_ECX_AVX512_VBMI } }, + { XSTATE_OPMASK_BIT, { FEAT_7_0_EDX, CPUID_7_0_EDX_AVX512_FP16 } }, + { XSTATE_PT_BIT, { FEAT_7_0_EBX, CPUID_7_0_EBX_INTEL_PT } }, + { XSTATE_PKRU_BIT, { FEAT_7_0_ECX, CPUID_7_0_ECX_PKU } }, + { XSTATE_XTILE_CFG_BIT, { FEAT_7_0_EDX, CPUID_7_0_EDX_AMX_BF16 } }, + { XSTATE_XTILE_CFG_BIT, { FEAT_7_0_EDX, CPUID_7_0_EDX_AMX_TILE } }, + { XSTATE_XTILE_CFG_BIT, { FEAT_7_0_EDX, CPUID_7_0_EDX_AMX_INT8 } }, }; static struct kvm_cpuid_entry2 *find_in_supported_entry(uint32_t function, -- 2.34.1