[PATCH 00/10] hw/i386/pc: Remove deprecated 3.1 machines

[PATCH 00/10] hw/i386/pc: Remove deprecated 3.1 machines

[Philippe Mathieu-Daudé]

1 y.o. dust Thomas asked me to rebase & post:

The versioned 'pc' and 'q35' machines up to 3.1 been marked
as deprecated two releases ago, and are older than 6 years,
so according to our support policy we can remove them.

Based-on: <20260307150042.78030-1-philmd@linaro.org>
          "hw/i386/pc: Remove deprecated 3.0 machines"

Philippe Mathieu-Daudé (10):
  hw/i386/pc: Remove deprecated pc-q35-3.1 and pc-i440fx-3.1 machines
  hw/i386/pc: Remove PCMachineClass::pvh_enabled field
  hw/i386/x86: Remove @pvh_enabled argument in x86_load_linux()
  hw/core/boards: Remove MachineClass::smbus_no_migration_support field
  hw/i386/pc: Remove pc_compat_3_1[] array
  hw/i386/iommu: Remove IntelIOMMUState::dma_drain field
  target/i386/cpu: Remove X86CPU::intel_pt_auto_level field
  hw/core/machine: Remove the hw_compat_3_1[] array
  hw/pci-bridge/pcie_rp: Remove PCIESlot::disable_acs field
  hw/tpm: Remove CRBState::ppi_enabled field

 hw/tpm/tpm_tis.h               |  1 -
 include/hw/core/boards.h       |  4 ----
 include/hw/i2c/pm_smbus.h      |  7 -------
 include/hw/i386/intel_iommu.h  |  1 -
 include/hw/i386/microvm.h      |  2 +-
 include/hw/i386/pc.h           |  6 ------
 include/hw/i386/x86.h          |  3 +--
 include/hw/pci/pcie_port.h     |  3 ---
 target/i386/cpu.h              |  3 ---
 hw/acpi/piix4.c                |  8 +-------
 hw/acpi/tpm.c                  |  4 ----
 hw/core/machine.c              | 17 -----------------
 hw/i2c/pm_smbus.c              |  7 -------
 hw/i2c/smbus_eeprom.c          |  4 +---
 hw/i2c/smbus_ich9.c            | 10 ++--------
 hw/i386/acpi-build.c           |  2 +-
 hw/i386/intel_iommu.c          | 11 +----------
 hw/i386/microvm.c              |  2 +-
 hw/i386/nitro_enclave.c        |  2 +-
 hw/i386/pc.c                   | 31 ++-----------------------------
 hw/i386/pc_piix.c              | 13 -------------
 hw/i386/pc_q35.c               | 14 --------------
 hw/i386/x86-common.c           |  6 ++----
 hw/pci-bridge/pcie_root_port.c |  3 +--
 hw/tpm/tpm_crb.c               | 12 +++---------
 hw/tpm/tpm_tis_common.c        |  4 +---
 hw/tpm/tpm_tis_isa.c           |  7 ++-----
 target/i386/cpu.c              |  8 --------
 28 files changed, 21 insertions(+), 174 deletions(-)

-- 
2.52.0

[PATCH 01/10] hw/i386/pc: Remove deprecated pc-q35-3.1 and pc-i440fx-3.1 machines

[Philippe Mathieu-Daudé]

These machines has been supported for a period of more than 6 years.
According to our versioned machine support policy (see commit
ce80c4fa6ff "docs: document special exception for machine type
deprecation & removal") they can now be removed.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/i386/pc_piix.c | 13 -------------
 hw/i386/pc_q35.c  | 14 --------------
 2 files changed, 27 deletions(-)

diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 29c8e997131..13981fb3aba 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -655,19 +655,6 @@ static void pc_i440fx_machine_4_0_options(MachineClass *m)
 
 DEFINE_I440FX_MACHINE(4, 0);
 
-static void pc_i440fx_machine_3_1_options(MachineClass *m)
-{
-    PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
-
-    pc_i440fx_machine_4_0_options(m);
-    m->smbus_no_migration_support = true;
-    pcmc->pvh_enabled = false;
-    compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
-    compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
-}
-
-DEFINE_I440FX_MACHINE(3, 1);
-
 #ifdef CONFIG_XEN
 static void xenfv_machine_4_2_options(MachineClass *m)
 {
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index f102da8e4a1..52b8064b4d2 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -600,17 +600,3 @@ static void pc_q35_machine_4_0_options(MachineClass *m)
 }
 
 DEFINE_Q35_MACHINE(4, 0);
-
-static void pc_q35_machine_3_1_options(MachineClass *m)
-{
-    PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
-
-    pc_q35_machine_4_0_options(m);
-    m->default_kernel_irqchip_split = false;
-    m->smbus_no_migration_support = true;
-    pcmc->pvh_enabled = false;
-    compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
-    compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
-}
-
-DEFINE_Q35_MACHINE(3, 1);
-- 
2.52.0

[PATCH 02/10] hw/i386/pc: Remove PCMachineClass::pvh_enabled field

[Philippe Mathieu-Daudé]

The PCMachineClass::pvh_enabled boolean was only used by
the pc-q35-3.1 and pc-i440fx-3.1 machines, which got removed.
Remove it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/i386/pc.h | 3 ---
 hw/i386/pc.c         | 6 ++----
 hw/i386/x86-common.c | 3 +--
 3 files changed, 3 insertions(+), 9 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 5623660f5dd..908de5e1eab 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -110,9 +110,6 @@ struct PCMachineClass {
     bool enforce_amd_1tb_hole;
     bool isa_bios_alias;
 
-    /* use PVH to load kernels that support this feature */
-    bool pvh_enabled;
-
     /* create kvmclock device even when KVM PV features are not exposed */
     bool kvmclock_create_always;
 
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index a38634e3577..107f12cbe73 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -597,7 +597,6 @@ void xen_load_linux(PCMachineState *pcms)
 {
     int i;
     FWCfgState *fw_cfg;
-    PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
     X86MachineState *x86ms = X86_MACHINE(pcms);
 
     assert(MACHINE(pcms)->kernel_filename != NULL);
@@ -607,7 +606,7 @@ void xen_load_linux(PCMachineState *pcms)
     fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus);
     rom_set_fw(fw_cfg);
 
-    x86_load_linux(x86ms, fw_cfg, PC_FW_DATA, pcmc->pvh_enabled);
+    x86_load_linux(x86ms, fw_cfg, PC_FW_DATA, true);
     for (i = 0; i < nb_option_roms; i++) {
         assert(!strcmp(option_rom[i].name, "linuxboot_dma.bin") ||
                !strcmp(option_rom[i].name, "pvh.bin") ||
@@ -941,7 +940,7 @@ void pc_memory_init(PCMachineState *pcms,
     }
 
     if (linux_boot) {
-        x86_load_linux(x86ms, fw_cfg, PC_FW_DATA, pcmc->pvh_enabled);
+        x86_load_linux(x86ms, fw_cfg, PC_FW_DATA, true);
     }
 
     for (i = 0; i < nb_option_roms; i++) {
@@ -1682,7 +1681,6 @@ static void pc_machine_class_init(ObjectClass *oc, const void *data)
     pcmc->has_reserved_memory = true;
     pcmc->enforce_amd_1tb_hole = true;
     pcmc->isa_bios_alias = true;
-    pcmc->pvh_enabled = true;
     pcmc->kvmclock_create_always = true;
     x86mc->apic_xrupt_override = true;
     assert(!mc->get_hotplug_handler);
diff --git a/hw/i386/x86-common.c b/hw/i386/x86-common.c
index a420112666a..db8d4e855f4 100644
--- a/hw/i386/x86-common.c
+++ b/hw/i386/x86-common.c
@@ -704,8 +704,7 @@ void x86_load_linux(X86MachineState *x86ms,
          * saving the PVH entry point used by the x86/HVM direct boot ABI.
          * If load_elfboot() is successful, populate the fw_cfg info.
          */
-        if (pvh_enabled &&
-            load_elfboot(kernel_filename, kernel_size,
+        if (load_elfboot(kernel_filename, kernel_size,
                          header, pvh_start_addr, fw_cfg)) {
             fclose(f);
 
-- 
2.52.0

[PATCH 03/10] hw/i386/x86: Remove @pvh_enabled argument in x86_load_linux()

[Philippe Mathieu-Daudé]

x86_load_linux()'s @pvh_enabled is now always %true: remove it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/i386/microvm.h | 2 +-
 include/hw/i386/x86.h     | 3 +--
 hw/i386/microvm.c         | 2 +-
 hw/i386/nitro_enclave.c   | 2 +-
 hw/i386/pc.c              | 4 ++--
 hw/i386/x86-common.c      | 3 +--
 6 files changed, 7 insertions(+), 9 deletions(-)

diff --git a/include/hw/i386/microvm.h b/include/hw/i386/microvm.h
index 6b9a5065272..184b7a8c094 100644
--- a/include/hw/i386/microvm.h
+++ b/include/hw/i386/microvm.h
@@ -79,7 +79,7 @@ struct MicrovmMachineClass {
     HotplugHandler *(*orig_hotplug_handler)(MachineState *machine,
                                            DeviceState *dev);
     void (*x86_load_linux)(X86MachineState *x86ms, FWCfgState *fw_cfg,
-                        int acpi_data_size, bool pvh_enabled);
+                           int acpi_data_size);
 };
 
 struct MicrovmMachineState {
diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
index a85a5600ce9..71fe6b5e122 100644
--- a/include/hw/i386/x86.h
+++ b/include/hw/i386/x86.h
@@ -129,8 +129,7 @@ void x86_bios_rom_reload(X86MachineState *x86ms);
 
 void x86_load_linux(X86MachineState *x86ms,
                     FWCfgState *fw_cfg,
-                    int acpi_data_size,
-                    bool pvh_enabled);
+                    int acpi_data_size);
 
 bool x86_machine_is_smm_enabled(const X86MachineState *x86ms);
 bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms);
diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c
index 7ff20512636..5a7889f21b8 100644
--- a/hw/i386/microvm.c
+++ b/hw/i386/microvm.c
@@ -330,7 +330,7 @@ static void microvm_memory_init(MicrovmMachineState *mms)
     rom_set_fw(fw_cfg);
 
     if (machine->kernel_filename != NULL) {
-        mmc->x86_load_linux(x86ms, fw_cfg, 0, true);
+        mmc->x86_load_linux(x86ms, fw_cfg, 0);
     }
 
     if (mms->option_roms) {
diff --git a/hw/i386/nitro_enclave.c b/hw/i386/nitro_enclave.c
index 640b1d8c548..8e72dc49f34 100644
--- a/hw/i386/nitro_enclave.c
+++ b/hw/i386/nitro_enclave.c
@@ -199,7 +199,7 @@ static void x86_load_eif(X86MachineState *x86ms, FWCfgState *fw_cfg,
         machine->kernel_cmdline = eif_cmdline;
     }
 
-    x86_load_linux(x86ms, fw_cfg, 0, true);
+    x86_load_linux(x86ms, fw_cfg, 0);
 
     unlink(machine->kernel_filename);
     unlink(machine->initrd_filename);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 107f12cbe73..b11afa0531c 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -606,7 +606,7 @@ void xen_load_linux(PCMachineState *pcms)
     fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus);
     rom_set_fw(fw_cfg);
 
-    x86_load_linux(x86ms, fw_cfg, PC_FW_DATA, true);
+    x86_load_linux(x86ms, fw_cfg, PC_FW_DATA);
     for (i = 0; i < nb_option_roms; i++) {
         assert(!strcmp(option_rom[i].name, "linuxboot_dma.bin") ||
                !strcmp(option_rom[i].name, "pvh.bin") ||
@@ -940,7 +940,7 @@ void pc_memory_init(PCMachineState *pcms,
     }
 
     if (linux_boot) {
-        x86_load_linux(x86ms, fw_cfg, PC_FW_DATA, true);
+        x86_load_linux(x86ms, fw_cfg, PC_FW_DATA);
     }
 
     for (i = 0; i < nb_option_roms; i++) {
diff --git a/hw/i386/x86-common.c b/hw/i386/x86-common.c
index db8d4e855f4..fde05fa7d7b 100644
--- a/hw/i386/x86-common.c
+++ b/hw/i386/x86-common.c
@@ -642,8 +642,7 @@ static bool load_elfboot(const char *kernel_filename,
 
 void x86_load_linux(X86MachineState *x86ms,
                     FWCfgState *fw_cfg,
-                    int acpi_data_size,
-                    bool pvh_enabled)
+                    int acpi_data_size)
 {
     uint16_t protocol;
     int setup_size, kernel_size, cmdline_size;
-- 
2.52.0

[PATCH 04/10] hw/core/boards: Remove MachineClass::smbus_no_migration_support field

[Philippe Mathieu-Daudé]

The MachineClass::smbus_no_migration_support boolean was only used
by the pc-q35-3.1 and pc-i440fx-3.1 machines, which got removed.
Remove it, along with pm_smbus_vmstate_needed().

Use the unconditional VMSTATE_BOOL() and VMSTATE_STRUCT() macros.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/core/boards.h  |  1 -
 include/hw/i2c/pm_smbus.h |  7 -------
 hw/acpi/piix4.c           |  8 +-------
 hw/i2c/pm_smbus.c         |  7 -------
 hw/i2c/smbus_eeprom.c     |  4 +---
 hw/i2c/smbus_ich9.c       | 10 ++--------
 6 files changed, 4 insertions(+), 33 deletions(-)

diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h
index 9ad2a7d5c97..e15dbcea83b 100644
--- a/include/hw/core/boards.h
+++ b/include/hw/core/boards.h
@@ -314,7 +314,6 @@ struct MachineClass {
     bool auto_enable_numa_with_memhp;
     bool auto_enable_numa_with_memdev;
     bool ignore_boot_device_suffixes;
-    bool smbus_no_migration_support;
     bool nvdimm_supported;
     bool numa_mem_supported;
     bool auto_enable_numa;
diff --git a/include/hw/i2c/pm_smbus.h b/include/hw/i2c/pm_smbus.h
index dafe0df4f69..62bbd45e803 100644
--- a/include/hw/i2c/pm_smbus.h
+++ b/include/hw/i2c/pm_smbus.h
@@ -44,13 +44,6 @@ typedef struct PMSMBus {
 
 void pm_smbus_init(DeviceState *parent, PMSMBus *smb, bool force_aux_blk);
 
-/*
- * For backwards compatibility on migration, older versions don't have
- * working migration for pm_smbus, this lets us ignore the migrations
- * for older machine versions.
- */
-bool pm_smbus_vmstate_needed(void);
-
 extern const VMStateDescription pmsmb_vmstate;
 
 #endif /* PM_SMBUS_H */
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index 138ac3d3940..43860d12278 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -205,11 +205,6 @@ static const VMStateDescription vmstate_cpuhp_state = {
     }
 };
 
-static bool piix4_vmstate_need_smbus(void *opaque, int version_id)
-{
-    return pm_smbus_vmstate_needed();
-}
-
 /*
  * This is a fudge to turn off the acpi_index field,
  * whose test was always broken on piix4 with 6.2 and older machine types.
@@ -238,8 +233,7 @@ static const VMStateDescription vmstate_acpi = {
         VMSTATE_UINT16(ar.pm1.evt.en, PIIX4PMState),
         VMSTATE_UINT16(ar.pm1.cnt.cnt, PIIX4PMState),
         VMSTATE_STRUCT(apm, PIIX4PMState, 0, vmstate_apm, APMState),
-        VMSTATE_STRUCT_TEST(smb, PIIX4PMState, piix4_vmstate_need_smbus, 3,
-                            pmsmb_vmstate, PMSMBus),
+        VMSTATE_STRUCT(smb, PIIX4PMState, 3, pmsmb_vmstate, PMSMBus),
         VMSTATE_TIMER_PTR(ar.tmr.timer, PIIX4PMState),
         VMSTATE_INT64(ar.tmr.overflow_time, PIIX4PMState),
         VMSTATE_STRUCT(ar.gpe, PIIX4PMState, 2, vmstate_gpe, ACPIGPE),
diff --git a/hw/i2c/pm_smbus.c b/hw/i2c/pm_smbus.c
index ead53d2724d..5654d516382 100644
--- a/hw/i2c/pm_smbus.c
+++ b/hw/i2c/pm_smbus.c
@@ -443,13 +443,6 @@ static const MemoryRegionOps pm_smbus_ops = {
     .endianness = DEVICE_LITTLE_ENDIAN,
 };
 
-bool pm_smbus_vmstate_needed(void)
-{
-    MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
-
-    return !mc->smbus_no_migration_support;
-}
-
 const VMStateDescription pmsmb_vmstate = {
     .name = "pmsmb",
     .version_id = 1,
diff --git a/hw/i2c/smbus_eeprom.c b/hw/i2c/smbus_eeprom.c
index d9ac556a0ab..693d4762205 100644
--- a/hw/i2c/smbus_eeprom.c
+++ b/hw/i2c/smbus_eeprom.c
@@ -88,11 +88,9 @@ static int eeprom_write_data(SMBusDevice *dev, uint8_t *buf, uint8_t len)
 
 static bool smbus_eeprom_vmstate_needed(void *opaque)
 {
-    MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
     SMBusEEPROMDevice *eeprom = opaque;
 
-    return (eeprom->accessed || smbus_vmstate_needed(&eeprom->smbusdev)) &&
-        !mc->smbus_no_migration_support;
+    return eeprom->accessed || smbus_vmstate_needed(&eeprom->smbusdev);
 }
 
 static const VMStateDescription vmstate_smbus_eeprom = {
diff --git a/hw/i2c/smbus_ich9.c b/hw/i2c/smbus_ich9.c
index 956c9b59bbc..51513e73fde 100644
--- a/hw/i2c/smbus_ich9.c
+++ b/hw/i2c/smbus_ich9.c
@@ -41,20 +41,14 @@ struct ICH9SMBState {
     PMSMBus smb;
 };
 
-static bool ich9_vmstate_need_smbus(void *opaque, int version_id)
-{
-    return pm_smbus_vmstate_needed();
-}
-
 static const VMStateDescription vmstate_ich9_smbus = {
     .name = "ich9_smb",
     .version_id = 1,
     .minimum_version_id = 1,
     .fields = (const VMStateField[]) {
         VMSTATE_PCI_DEVICE(dev, ICH9SMBState),
-        VMSTATE_BOOL_TEST(irq_enabled, ICH9SMBState, ich9_vmstate_need_smbus),
-        VMSTATE_STRUCT_TEST(smb, ICH9SMBState, ich9_vmstate_need_smbus, 1,
-                            pmsmb_vmstate, PMSMBus),
+        VMSTATE_BOOL(irq_enabled, ICH9SMBState),
+        VMSTATE_STRUCT(smb, ICH9SMBState, 1, pmsmb_vmstate, PMSMBus),
         VMSTATE_END_OF_LIST()
     }
 };
-- 
2.52.0

[PATCH 05/10] hw/i386/pc: Remove pc_compat_3_1[] array

[Philippe Mathieu-Daudé]

The pc_compat_3_1[] array was only used by the pc-q35-3.1
and pc-i440fx-3.1 machines, which got removed. Remove it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/i386/pc.h |  3 ---
 hw/i386/pc.c         | 25 -------------------------
 2 files changed, 28 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 908de5e1eab..4e1dd436ab7 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -271,9 +271,6 @@ extern const size_t pc_compat_4_1_len;
 extern GlobalProperty pc_compat_4_0[];
 extern const size_t pc_compat_4_0_len;
 
-extern GlobalProperty pc_compat_3_1[];
-extern const size_t pc_compat_3_1_len;
-
 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
     static void pc_machine_##suffix##_class_init(ObjectClass *oc, \
                                                  const void *data) \
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index b11afa0531c..93d1a52d712 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -189,31 +189,6 @@ const size_t pc_compat_4_1_len = G_N_ELEMENTS(pc_compat_4_1);
 GlobalProperty pc_compat_4_0[] = {};
 const size_t pc_compat_4_0_len = G_N_ELEMENTS(pc_compat_4_0);
 
-GlobalProperty pc_compat_3_1[] = {
-    { "intel-iommu", "dma-drain", "off" },
-    { "Opteron_G3" "-" TYPE_X86_CPU, "rdtscp", "off" },
-    { "Opteron_G4" "-" TYPE_X86_CPU, "rdtscp", "off" },
-    { "Opteron_G4" "-" TYPE_X86_CPU, "npt", "off" },
-    { "Opteron_G4" "-" TYPE_X86_CPU, "nrip-save", "off" },
-    { "Opteron_G5" "-" TYPE_X86_CPU, "rdtscp", "off" },
-    { "Opteron_G5" "-" TYPE_X86_CPU, "npt", "off" },
-    { "Opteron_G5" "-" TYPE_X86_CPU, "nrip-save", "off" },
-    { "EPYC" "-" TYPE_X86_CPU, "npt", "off" },
-    { "EPYC" "-" TYPE_X86_CPU, "nrip-save", "off" },
-    { "EPYC-IBPB" "-" TYPE_X86_CPU, "npt", "off" },
-    { "EPYC-IBPB" "-" TYPE_X86_CPU, "nrip-save", "off" },
-    { "Skylake-Client" "-" TYPE_X86_CPU,      "mpx", "on" },
-    { "Skylake-Client-IBRS" "-" TYPE_X86_CPU, "mpx", "on" },
-    { "Skylake-Server" "-" TYPE_X86_CPU,      "mpx", "on" },
-    { "Skylake-Server-IBRS" "-" TYPE_X86_CPU, "mpx", "on" },
-    { "Cascadelake-Server" "-" TYPE_X86_CPU,  "mpx", "on" },
-    { "Icelake-Client" "-" TYPE_X86_CPU,      "mpx", "on" },
-    { "Icelake-Server" "-" TYPE_X86_CPU,      "mpx", "on" },
-    { "Cascadelake-Server" "-" TYPE_X86_CPU, "stepping", "5" },
-    { TYPE_X86_CPU, "x-intel-pt-auto-level", "off" },
-};
-const size_t pc_compat_3_1_len = G_N_ELEMENTS(pc_compat_3_1);
-
 /*
  * @PC_FW_DATA:
  * Size of the chunk of memory at the top of RAM for the BIOS ACPI tables
-- 
2.52.0

[PATCH 06/10] hw/i386/iommu: Remove IntelIOMMUState::dma_drain field

[Philippe Mathieu-Daudé]

The IntelIOMMUState::dma_drain boolean was only set in
the pc_compat_3_1[] array, via the 'dma-drain=off' property.
We removed all machines using that array, lets remove that
property and all the code around it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/i386/intel_iommu.h |  1 -
 hw/i386/intel_iommu.c         | 11 +----------
 2 files changed, 1 insertion(+), 11 deletions(-)

diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index 54c2b6b77a0..e44ce318417 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -314,7 +314,6 @@ struct IntelIOMMUState {
     bool intr_eime;                 /* Extended interrupt mode enabled */
     OnOffAuto intr_eim;             /* Toggle for EIM cabability */
     uint8_t aw_bits;                /* Host/IOVA address width (in bits) */
-    bool dma_drain;                 /* Whether DMA r/w draining enabled */
     bool pasid;                     /* Whether to support PASID */
     bool fs1gp;                     /* First Stage 1-GByte Page Support */
 
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index d24ba989bfc..f395fa248c0 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -4205,7 +4205,6 @@ static const Property vtd_properties[] = {
     DEFINE_PROP_BOOL("snoop-control", IntelIOMMUState, snoop_control, false),
     DEFINE_PROP_BOOL("x-pasid-mode", IntelIOMMUState, pasid, false),
     DEFINE_PROP_BOOL("svm", IntelIOMMUState, svm, false),
-    DEFINE_PROP_BOOL("dma-drain", IntelIOMMUState, dma_drain, true),
     DEFINE_PROP_BOOL("stale-tm", IntelIOMMUState, stale_tm, false),
     DEFINE_PROP_BOOL("fs1gp", IntelIOMMUState, fs1gp, true),
 };
@@ -5000,11 +4999,8 @@ static void vtd_cap_init(IntelIOMMUState *s)
     X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s);
 
     s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_ECAP_PT |
-             VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SSLPS |
+             VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SSLPS | VTD_CAP_DRAIN |
              VTD_CAP_ESRTPS | VTD_CAP_MGAW(s->aw_bits);
-    if (s->dma_drain) {
-        s->cap |= VTD_CAP_DRAIN;
-    }
     if (x86_iommu->dma_translation) {
             if (s->aw_bits >= VTD_HOST_AW_39BIT) {
                     s->cap |= VTD_CAP_SAGAW_39bit;
@@ -5582,11 +5578,6 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp)
         return false;
     }
 
-    if (s->scalable_mode && !s->dma_drain) {
-        error_setg(errp, "Need to set dma_drain for scalable mode");
-        return false;
-    }
-
     if (s->pasid && !s->scalable_mode) {
         error_setg(errp, "Need to set scalable mode for PASID");
         return false;
-- 
2.52.0

[PATCH 07/10] target/i386/cpu: Remove X86CPU::intel_pt_auto_level field

[Philippe Mathieu-Daudé]

The X86CPU::intel_pt_auto_level boolean was only set in the
pc_compat_3_1[] array, via the 'x-intel-pt-auto-level=off'
property. We removed all machines using that array, lets remove
that property and all the code around it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/i386/cpu.h | 3 ---
 target/i386/cpu.c | 8 --------
 2 files changed, 11 deletions(-)

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 2b70d56e9b0..5a62aa61579 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2457,9 +2457,6 @@ struct ArchCPU {
     /* Only advertise TOPOEXT features that AMD defines */
     bool amd_topoext_features_only;
 
-    /* Enable auto level-increase for Intel Processor Trace leave */
-    bool intel_pt_auto_level;
-
     /* if true fill the top bits of the MTRR_PHYSMASKn variable range */
     bool fill_mtrr_mask;
 
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index c77addd2c25..d8cd0d81d7f 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -9565,13 +9565,7 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
 
     /* Intel Processor Trace requires CPUID[0x14] */
     if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT)) {
-        if (cpu->intel_pt_auto_level) {
             x86_cpu_adjust_level(cpu, &cpu->env.cpuid_min_level, 0x14);
-        } else if (cpu->env.cpuid_min_level < 0x14) {
-            mark_unavailable_features(cpu, FEAT_7_0_EBX,
-                CPUID_7_0_EBX_INTEL_PT,
-                "Intel PT need CPUID leaf 0x14, please set by \"-cpu ...,intel-pt=on,min-level=0x14\"");
-        }
     }
 
     /*
@@ -10589,8 +10583,6 @@ static const Property x86_cpu_properties[] = {
      * to the specific Windows version being used."
      */
     DEFINE_PROP_INT32("x-hv-max-vps", X86CPU, hv_max_vps, -1),
-    DEFINE_PROP_BOOL("x-intel-pt-auto-level", X86CPU, intel_pt_auto_level,
-                     true),
     DEFINE_PROP_BOOL("x-l1-cache-per-thread", X86CPU, l1_cache_per_core, true),
     DEFINE_PROP_BOOL("x-force-cpuid-0x1f", X86CPU, force_cpuid_0x1f, false),
 
-- 
2.52.0

[PATCH 08/10] hw/core/machine: Remove the hw_compat_3_1[] array

[Philippe Mathieu-Daudé]

The hw_compat_3_1[] array was only used by the pc-q35-3.1
and pc-i440fx-3.1 machines, which got removed. Remove it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/core/boards.h |  3 ---
 hw/core/machine.c        | 17 -----------------
 2 files changed, 20 deletions(-)

diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h
index e15dbcea83b..9155e0cc9ed 100644
--- a/include/hw/core/boards.h
+++ b/include/hw/core/boards.h
@@ -867,7 +867,4 @@ extern const size_t hw_compat_4_1_len;
 extern GlobalProperty hw_compat_4_0[];
 extern const size_t hw_compat_4_0_len;
 
-extern GlobalProperty hw_compat_3_1[];
-extern const size_t hw_compat_3_1_len;
-
 #endif
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 162600425b0..9a3d826c3cb 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -221,23 +221,6 @@ GlobalProperty hw_compat_4_0[] = {
 };
 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
 
-GlobalProperty hw_compat_3_1[] = {
-    { "pcie-root-port", "x-speed", "2_5" },
-    { "pcie-root-port", "x-width", "1" },
-    { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
-    { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
-    { "tpm-crb", "ppi", "false" },
-    { "tpm-tis", "ppi", "false" },
-    { "usb-kbd", "serial", "42" },
-    { "usb-mouse", "serial", "42" },
-    { "usb-tablet", "serial", "42" },
-    { "virtio-blk-device", "discard", "false" },
-    { "virtio-blk-device", "write-zeroes", "false" },
-    { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
-    { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
-};
-const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
-
 MachineState *current_machine;
 
 static char *machine_get_kernel(Object *obj, Error **errp)
-- 
2.52.0

[PATCH 09/10] hw/pci-bridge/pcie_rp: Remove PCIESlot::disable_acs field

[Philippe Mathieu-Daudé]

The PCIESlot::disable_acs boolean was only set in the
hw_compat_3_1[] array, via the 'disable-acs=true' property.
We removed all machines using that array, lets remove that
property and all the code around it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/pci/pcie_port.h     | 3 ---
 hw/pci-bridge/pcie_root_port.c | 3 +--
 2 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
index 53cd64c5edf..b28af067a66 100644
--- a/include/hw/pci/pcie_port.h
+++ b/include/hw/pci/pcie_port.h
@@ -60,9 +60,6 @@ struct PCIESlot {
     PCIExpLinkWidth width;
     bool flitmode;
 
-    /* Disable ACS (really for a pcie_root_port) */
-    bool        disable_acs;
-
     /* Indicates whether any type of hot-plug is allowed on the slot */
     bool        hotplug;
 
diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c
index fe3ced56851..7c3e78010b4 100644
--- a/hw/pci-bridge/pcie_root_port.c
+++ b/hw/pci-bridge/pcie_root_port.c
@@ -117,7 +117,7 @@ static void rp_realize(PCIDevice *d, Error **errp)
     pcie_aer_root_init(d);
     rp_aer_vector_update(d);
 
-    if (rpc->acs_offset && !s->disable_acs) {
+    if (rpc->acs_offset) {
         pcie_acs_init(d, rpc->acs_offset);
     }
     return;
@@ -151,7 +151,6 @@ static void rp_exit(PCIDevice *d)
 static const Property rp_props[] = {
     DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present,
                     QEMU_PCIE_SLTCAP_PCP_BITNR, true),
-    DEFINE_PROP_BOOL("disable-acs", PCIESlot, disable_acs, false),
 };
 
 static void rp_instance_post_init(Object *obj)
-- 
2.52.0

[PATCH 10/10] hw/tpm: Remove CRBState::ppi_enabled field

[Philippe Mathieu-Daudé]

The CRBState::ppi_enabled boolean was only set in the
hw_compat_3_1[] array, via the 'ppi=false' property.
We removed all machines using that array, lets remove
that property and all the code around it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/tpm/tpm_tis.h        |  1 -
 hw/acpi/tpm.c           |  4 ----
 hw/i386/acpi-build.c    |  2 +-
 hw/tpm/tpm_crb.c        | 12 +++---------
 hw/tpm/tpm_tis_common.c |  4 +---
 hw/tpm/tpm_tis_isa.c    |  7 ++-----
 6 files changed, 7 insertions(+), 23 deletions(-)

diff --git a/hw/tpm/tpm_tis.h b/hw/tpm/tpm_tis.h
index 184632ff66b..0df45f0c716 100644
--- a/hw/tpm/tpm_tis.h
+++ b/hw/tpm/tpm_tis.h
@@ -75,7 +75,6 @@ typedef struct TPMState {
 
     size_t be_buffer_size;
 
-    bool ppi_enabled;
     TPMPPI ppi;
 } TPMState;
 
diff --git a/hw/acpi/tpm.c b/hw/acpi/tpm.c
index cdc02275365..922030a29bf 100644
--- a/hw/acpi/tpm.c
+++ b/hw/acpi/tpm.c
@@ -25,10 +25,6 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev)
     Aml *method, *field, *ifctx, *ifctx2, *ifctx3, *func_mask,
         *not_implemented, *pak, *tpm2, *tpm3, *pprm, *pprq, *zero, *one;
 
-    if (!object_property_get_bool(OBJECT(tpm), "ppi", &error_abort)) {
-        return;
-    }
-
     zero = aml_int(0);
     one = aml_int(1);
     func_mask = aml_int(TPM_PPI_FUNC_MASK);
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index f622b91b76a..6b7cd00c5db 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2218,7 +2218,7 @@ void acpi_setup(void)
                     tables.tcpalog->data, acpi_data_len(tables.tcpalog));
 
     tpm = tpm_find();
-    if (tpm && object_property_get_bool(OBJECT(tpm), "ppi", &error_abort)) {
+    if (tpm) {
         tpm_config = (FwCfgTPMConfig) {
             .tpmppi_address = cpu_to_le32(TPM_PPI_ADDR_BASE),
             .tpm_version = tpm_get_version(tpm),
diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c
index 8723536f931..40ffc7b006b 100644
--- a/hw/tpm/tpm_crb.c
+++ b/hw/tpm/tpm_crb.c
@@ -43,7 +43,6 @@ struct CRBState {
 
     size_t be_buffer_size;
 
-    bool ppi_enabled;
     TPMPPI ppi;
 };
 typedef struct CRBState CRBState;
@@ -228,16 +227,13 @@ static const VMStateDescription vmstate_tpm_crb = {
 
 static const Property tpm_crb_properties[] = {
     DEFINE_PROP_TPMBE("tpmdev", CRBState, tpmbe),
-    DEFINE_PROP_BOOL("ppi", CRBState, ppi_enabled, true),
 };
 
 static void tpm_crb_reset(void *dev)
 {
     CRBState *s = CRB(dev);
 
-    if (s->ppi_enabled) {
-        tpm_ppi_reset(&s->ppi);
-    }
+    tpm_ppi_reset(&s->ppi);
     tpm_backend_reset(s->tpmbe);
 
     memset(s->regs, 0, sizeof(s->regs));
@@ -303,10 +299,8 @@ static void tpm_crb_realize(DeviceState *dev, Error **errp)
     memory_region_add_subregion(get_system_memory(),
         TPM_CRB_ADDR_BASE + sizeof(s->regs), &s->cmdmem);
 
-    if (s->ppi_enabled) {
-        tpm_ppi_init(&s->ppi, get_system_memory(),
-                     TPM_PPI_ADDR_BASE, OBJECT(s));
-    }
+    tpm_ppi_init(&s->ppi, get_system_memory(),
+                 TPM_PPI_ADDR_BASE, OBJECT(s));
 
     if (xen_enabled()) {
         tpm_crb_reset(dev);
diff --git a/hw/tpm/tpm_tis_common.c b/hw/tpm/tpm_tis_common.c
index f594b15b8ab..712d64b60f1 100644
--- a/hw/tpm/tpm_tis_common.c
+++ b/hw/tpm/tpm_tis_common.c
@@ -821,9 +821,7 @@ void tpm_tis_reset(TPMState *s)
     s->be_buffer_size = MIN(tpm_backend_get_buffer_size(s->be_driver),
                             TPM_TIS_BUFFER_MAX);
 
-    if (s->ppi_enabled) {
-        tpm_ppi_reset(&s->ppi);
-    }
+    tpm_ppi_reset(&s->ppi);
     tpm_backend_reset(s->be_driver);
 
     s->active_locty = TPM_TIS_NO_LOCALITY;
diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c
index 61e95434f5b..aadca4ed79b 100644
--- a/hw/tpm/tpm_tis_isa.c
+++ b/hw/tpm/tpm_tis_isa.c
@@ -94,7 +94,6 @@ static void tpm_tis_isa_reset(DeviceState *dev)
 static const Property tpm_tis_isa_properties[] = {
     DEFINE_PROP_UINT32("irq", TPMStateISA, state.irq_num, TPM_TIS_IRQ),
     DEFINE_PROP_TPMBE("tpmdev", TPMStateISA, state.be_driver),
-    DEFINE_PROP_BOOL("ppi", TPMStateISA, state.ppi_enabled, true),
 };
 
 static void tpm_tis_isa_initfn(Object *obj)
@@ -132,10 +131,8 @@ static void tpm_tis_isa_realizefn(DeviceState *dev, Error **errp)
     memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)),
                                 TPM_TIS_ADDR_BASE, &s->mmio);
 
-    if (s->ppi_enabled) {
-        tpm_ppi_init(&s->ppi, isa_address_space(ISA_DEVICE(dev)),
-                     TPM_PPI_ADDR_BASE, OBJECT(dev));
-    }
+    tpm_ppi_init(&s->ppi, isa_address_space(ISA_DEVICE(dev)),
+                 TPM_PPI_ADDR_BASE, OBJECT(dev));
 }
 
 static void build_tpm_tis_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
-- 
2.52.0

Re: [PATCH 01/10] hw/i386/pc: Remove deprecated pc-q35-3.1 and pc-i440fx-3.1 machines

[Thomas Huth]

On 07/03/2026 16.26, Philippe Mathieu-Daudé wrote:
> These machines has been supported for a period of more than 6 years.
> According to our versioned machine support policy (see commit
> ce80c4fa6ff "docs: document special exception for machine type
> deprecation & removal") they can now be removed.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   hw/i386/pc_piix.c | 13 -------------
>   hw/i386/pc_q35.c  | 14 --------------
>   2 files changed, 27 deletions(-)

Reviewed-by: Thomas Huth <thuth@redhat.com>

Re: [PATCH 02/10] hw/i386/pc: Remove PCMachineClass::pvh_enabled field

[Thomas Huth]

On 07/03/2026 16.26, Philippe Mathieu-Daudé wrote:
> The PCMachineClass::pvh_enabled boolean was only used by
> the pc-q35-3.1 and pc-i440fx-3.1 machines, which got removed.
> Remove it.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   include/hw/i386/pc.h | 3 ---
>   hw/i386/pc.c         | 6 ++----
>   hw/i386/x86-common.c | 3 +--
>   3 files changed, 3 insertions(+), 9 deletions(-)

Reviewed-by: Thomas Huth <thuth@redhat.com>

Re: [PATCH 03/10] hw/i386/x86: Remove @pvh_enabled argument in x86_load_linux()

[Thomas Huth]

On 07/03/2026 16.26, Philippe Mathieu-Daudé wrote:
> x86_load_linux()'s @pvh_enabled is now always %true: remove it.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   include/hw/i386/microvm.h | 2 +-
>   include/hw/i386/x86.h     | 3 +--
>   hw/i386/microvm.c         | 2 +-
>   hw/i386/nitro_enclave.c   | 2 +-
>   hw/i386/pc.c              | 4 ++--
>   hw/i386/x86-common.c      | 3 +--
>   6 files changed, 7 insertions(+), 9 deletions(-)

Reviewed-by: Thomas Huth <thuth@redhat.com>

Re: [PATCH 04/10] hw/core/boards: Remove MachineClass::smbus_no_migration_support field

[Thomas Huth]

On 07/03/2026 16.26, Philippe Mathieu-Daudé wrote:
> The MachineClass::smbus_no_migration_support boolean was only used
> by the pc-q35-3.1 and pc-i440fx-3.1 machines, which got removed.
> Remove it, along with pm_smbus_vmstate_needed().
> 
> Use the unconditional VMSTATE_BOOL() and VMSTATE_STRUCT() macros.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   include/hw/core/boards.h  |  1 -
>   include/hw/i2c/pm_smbus.h |  7 -------
>   hw/acpi/piix4.c           |  8 +-------
>   hw/i2c/pm_smbus.c         |  7 -------
>   hw/i2c/smbus_eeprom.c     |  4 +---
>   hw/i2c/smbus_ich9.c       | 10 ++--------
>   6 files changed, 4 insertions(+), 33 deletions(-)

Reviewed-by: Thomas Huth <thuth@redhat.com>

Re: [PATCH 05/10] hw/i386/pc: Remove pc_compat_3_1[] array

[Thomas Huth]

On 07/03/2026 16.26, Philippe Mathieu-Daudé wrote:
> The pc_compat_3_1[] array was only used by the pc-q35-3.1
> and pc-i440fx-3.1 machines, which got removed. Remove it.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   include/hw/i386/pc.h |  3 ---
>   hw/i386/pc.c         | 25 -------------------------
>   2 files changed, 28 deletions(-)

Reviewed-by: Thomas Huth <thuth@redhat.com>

Re: [PATCH 06/10] hw/i386/iommu: Remove IntelIOMMUState::dma_drain field

[Thomas Huth]

On 07/03/2026 16.26, Philippe Mathieu-Daudé wrote:
> The IntelIOMMUState::dma_drain boolean was only set in
> the pc_compat_3_1[] array, via the 'dma-drain=off' property.
> We removed all machines using that array, lets remove that
> property and all the code around it.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   include/hw/i386/intel_iommu.h |  1 -
>   hw/i386/intel_iommu.c         | 11 +----------
>   2 files changed, 1 insertion(+), 11 deletions(-)

Reviewed-by: Thomas Huth <thuth@redhat.com>

Re: [PATCH 07/10] target/i386/cpu: Remove X86CPU::intel_pt_auto_level field

[Thomas Huth]

On 07/03/2026 16.26, Philippe Mathieu-Daudé wrote:
> The X86CPU::intel_pt_auto_level boolean was only set in the
> pc_compat_3_1[] array, via the 'x-intel-pt-auto-level=off'
> property. We removed all machines using that array, lets remove

s/lets/let's/

> that property and all the code around it.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/i386/cpu.h | 3 ---
>   target/i386/cpu.c | 8 --------
>   2 files changed, 11 deletions(-)
> 
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index 2b70d56e9b0..5a62aa61579 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -2457,9 +2457,6 @@ struct ArchCPU {
>       /* Only advertise TOPOEXT features that AMD defines */
>       bool amd_topoext_features_only;
>   
> -    /* Enable auto level-increase for Intel Processor Trace leave */
> -    bool intel_pt_auto_level;
> -
>       /* if true fill the top bits of the MTRR_PHYSMASKn variable range */
>       bool fill_mtrr_mask;
>   
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index c77addd2c25..d8cd0d81d7f 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -9565,13 +9565,7 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
>   
>       /* Intel Processor Trace requires CPUID[0x14] */
>       if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT)) {
> -        if (cpu->intel_pt_auto_level) {
>               x86_cpu_adjust_level(cpu, &cpu->env.cpuid_min_level, 0x14);

I think we should decrease the indentation here now?

> -        } else if (cpu->env.cpuid_min_level < 0x14) {
> -            mark_unavailable_features(cpu, FEAT_7_0_EBX,
> -                CPUID_7_0_EBX_INTEL_PT,
> -                "Intel PT need CPUID leaf 0x14, please set by \"-cpu ...,intel-pt=on,min-level=0x14\"");
> -        }
>       }

With the indentation fixed:
Reviewed-by: Thomas Huth <thuth@redhat.com>

Re: [PATCH 08/10] hw/core/machine: Remove the hw_compat_3_1[] array

[Thomas Huth]

On 07/03/2026 16.26, Philippe Mathieu-Daudé wrote:
> The hw_compat_3_1[] array was only used by the pc-q35-3.1
> and pc-i440fx-3.1 machines, which got removed. Remove it.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   include/hw/core/boards.h |  3 ---
>   hw/core/machine.c        | 17 -----------------
>   2 files changed, 20 deletions(-)

Reviewed-by: Thomas Huth <thuth@redhat.com>

Re: [PATCH 09/10] hw/pci-bridge/pcie_rp: Remove PCIESlot::disable_acs field

[Thomas Huth]

On 07/03/2026 16.26, Philippe Mathieu-Daudé wrote:
> The PCIESlot::disable_acs boolean was only set in the
> hw_compat_3_1[] array, via the 'disable-acs=true' property.
> We removed all machines using that array, lets remove that
> property and all the code around it.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   include/hw/pci/pcie_port.h     | 3 ---
>   hw/pci-bridge/pcie_root_port.c | 3 +--
>   2 files changed, 1 insertion(+), 5 deletions(-)

Reviewed-by: Thomas Huth <thuth@redhat.com>

Re: [PATCH 10/10] hw/tpm: Remove CRBState::ppi_enabled field

[Thomas Huth]

On 07/03/2026 16.26, Philippe Mathieu-Daudé wrote:
> The CRBState::ppi_enabled boolean was only set in the
> hw_compat_3_1[] array, via the 'ppi=false' property.
> We removed all machines using that array, lets remove
> that property and all the code around it.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   hw/tpm/tpm_tis.h        |  1 -
>   hw/acpi/tpm.c           |  4 ----
>   hw/i386/acpi-build.c    |  2 +-
>   hw/tpm/tpm_crb.c        | 12 +++---------
>   hw/tpm/tpm_tis_common.c |  4 +---
>   hw/tpm/tpm_tis_isa.c    |  7 ++-----
>   6 files changed, 7 insertions(+), 23 deletions(-)

Reviewed-by: Thomas Huth <thuth@redhat.com>

Re: [PATCH 10/10] hw/tpm: Remove CRBState::ppi_enabled field

[Stefan Berger]

On 3/7/26 10:26 AM, Philippe Mathieu-Daudé wrote:
> The CRBState::ppi_enabled boolean was only set in the
> hw_compat_3_1[] array, via the 'ppi=false' property.
> We removed all machines using that array, lets remove
> that property and all the code around it.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>