[PATCH 10/15] hw/alpha: Expose RAM to typhoon via QOM property link

[Yodel Eldar <yodel.eldar@yodel.dev>]

Currently, the board (Clipper/DP264) passes machine->ram to the
chipset (Typhoon) as an arg to typhoon_init(), where it is
added as a subregion of system memory. This commit, instead adds
a ram pointer in TyphoonState, defines it as a Property, and sets
a link to it from the machine, thus removing the ram parameter.

Note: Moving the ram subregion mapping into machine code was
considered but decided against so as to preserve the Typhoon's
historical role in mapping the address space.

Signed-off-by: Yodel Eldar <yodel.eldar@yodel.dev>
---
 hw/alpha/alpha_sys.h |  5 +++--
 hw/alpha/dp264.c     |  8 +++++---
 hw/alpha/typhoon.c   | 14 +++++++++++---
 3 files changed, 19 insertions(+), 8 deletions(-)

diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h
index 39a96760d7..8611881b55 100644
--- a/hw/alpha/alpha_sys.h
+++ b/hw/alpha/alpha_sys.h
@@ -11,8 +11,9 @@
 #define TYPE_TYPHOON_PCI_HOST_BRIDGE "typhoon-pcihost"
 OBJECT_DECLARE_SIMPLE_TYPE(TyphoonState, TYPHOON_PCI_HOST_BRIDGE)
 
-PCIBus *typhoon_init(MemoryRegion *,
-                     pci_map_irq_fn, uint8_t devfn_min, TyphoonState *);
+PCIBus *typhoon_init(pci_map_irq_fn, uint8_t devfn_min, TyphoonState *);
+
+#define TYPHOON_PROP_RAM "ram"
 
 #define TYPHOON_GPIO_ISA_IRQ "isa-irq"
 #define TYPHOON_GPIO_RTC_IRQ "rtc-irq"
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 61eeaef6db..a7fc137e70 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -102,12 +102,14 @@ static void clipper_init(MachineState *machine)
     cpus[0]->env.trap_arg1 = 0;
     cpus[0]->env.trap_arg2 = smp_cpus | (!machine->enable_graphics << 6);
 
+    object_property_set_link(typhoon_obj, TYPHOON_PROP_RAM,
+                             OBJECT(machine->ram), &error_fatal);
+
     /*
      * Init the chipset.  Because we're using CLIPPER IRQ mappings,
      * the minimum PCI device IdSel is 1.
      */
-    pci_bus = typhoon_init(machine->ram,
-                           clipper_pci_map_irq, PCI_DEVFN(1, 0), typhoon);
+    pci_bus = typhoon_init(clipper_pci_map_irq, PCI_DEVFN(1, 0), typhoon);
 
     /*
      * Init the PCI -> ISA bridge.
@@ -245,7 +247,7 @@ static void clipper_machine_init(ObjectClass *oc, const void *data)
     mc->max_cpus = 4;
     mc->is_default = true;
     mc->default_cpu_type = ALPHA_CPU_TYPE_NAME("ev67");
-    mc->default_ram_id = "ram";
+    mc->default_ram_id = TYPHOON_PROP_RAM;
     mc->default_nic = "e1000";
 }
 
diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
index 03bb4c8055..792ace5ce7 100644
--- a/hw/alpha/typhoon.c
+++ b/hw/alpha/typhoon.c
@@ -55,6 +55,8 @@ struct TyphoonState {
     TyphoonCchip cchip;
     TyphoonPchip pchip;
     MemoryRegion dchip_region;
+
+    MemoryRegion *ram;
 };
 
 /* Called when one of DRIR or DIM changes.  */
@@ -831,8 +833,7 @@ static void typhoon_alarm_timer(void *opaque)
     cpu_interrupt(CPU(s->cchip.cpu[cpu]), CPU_INTERRUPT_TIMER);
 }
 
-PCIBus *typhoon_init(MemoryRegion *ram,
-                     pci_map_irq_fn sys_map_irq, uint8_t devfn_min,
+PCIBus *typhoon_init(pci_map_irq_fn sys_map_irq, uint8_t devfn_min,
                      TyphoonState *s)
 {
     MemoryRegion *addr_space = get_system_memory();
@@ -860,7 +861,7 @@ PCIBus *typhoon_init(MemoryRegion *ram,
      * Main memory region, 0x00.0000.0000.  Real hardware supports 32GB,
      * but the address space hole reserved at this point is 8TB.
      */
-    memory_region_add_subregion(addr_space, 0, ram);
+    memory_region_add_subregion(addr_space, 0, s->ram);
 
     /* TIGbus, 0x801.0000.0000, 1GB.  */
     /*
@@ -956,11 +957,18 @@ static void typhoon_pcihost_init(Object *obj)
                             1);
 }
 
+static const Property typhoon_properties[] = {
+    DEFINE_PROP_LINK(TYPHOON_PROP_RAM, TyphoonState, ram,
+                     TYPE_MEMORY_REGION, MemoryRegion *),
+};
+
 static void typhoon_pcihost_class_init(ObjectClass *klass, const void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
 
     dc->user_creatable = false;
+
+    device_class_set_props(dc, typhoon_properties);
 }
 
 static const TypeInfo typhoon_pcihost_info = {

-- 
2.53.0