From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: Jamin Lin <jamin_lin@aspeedtech.com>,
Troy Lee <troy_lee@aspeedtech.com>,
Kane Chen <kane_chen@aspeedtech.com>,
"flwu@google.com" <flwu@google.com>,
"nabihestefan@google.com" <nabihestefan@google.com>
Subject: [PATCH v1 10/13] hw/usb/hcd-ehci: Implement 64-bit siTD descriptor addressing
Date: Wed, 11 Mar 2026 07:26:27 +0000 [thread overview]
Message-ID: <20260311072614.1095587-11-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260311072614.1095587-1-jamin_lin@aspeedtech.com>
EHCI supports 64-bit control data structure addressing when the
64-bit Addressing Capability bit in HCCPARAMS is set. In that mode,
the CTRLDSSEGMENT register provides the upper 32 bits that are
concatenated with 32-bit link pointer values to form full 64-bit
descriptor addresses (EHCI 1.0, section 2.3.5 and Appendix B).
siTD link pointers are stored as 32-bit values and must be expanded
to full 64-bit descriptor addresses when 64-bit mode is enabled.
Update the siTD traversal path to use ehci_get_desc_addr() when
following link pointers.
Appendix B also defines high dword fields for siTD buffer pointers.
Add bufptr_hi[] fields to EHCIsitd and use ehci_get_buf_addr() to
construct full 64-bit buffer addresses from bufptr[] and bufptr_hi[]
when processing split isochronous transfers. This allows buffers
above 4GB to be handled correctly.
When 64-bit capability is disabled, descriptor and buffer addresses
remain 32-bit and existing behaviour is unchanged.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/usb/hcd-ehci.h | 1 +
hw/usb/hcd-ehci.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h
index f0cb50ba45..a11d4179cd 100644
--- a/hw/usb/hcd-ehci.h
+++ b/hw/usb/hcd-ehci.h
@@ -119,6 +119,7 @@ typedef struct EHCIsitd {
#define SITD_BUFPTR_TCNT_MASK 0x00000007
uint32_t backptr; /* Standard next link pointer */
+ uint32_t bufptr_hi[2];
} EHCIsitd;
/*
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
index a4a45c7601..d9d1ac2d28 100644
--- a/hw/usb/hcd-ehci.c
+++ b/hw/usb/hcd-ehci.c
@@ -1798,7 +1798,7 @@ static int ehci_state_fetchsitd(EHCIState *ehci, int async)
warn_report("Skipping active siTD");
}
- ehci_set_fetch_addr(ehci, async, sitd.next);
+ ehci_set_fetch_addr(ehci, async, ehci_get_desc_addr(ehci, sitd.next));
ehci_set_state(ehci, async, EST_FETCHENTRY);
return 1;
}
--
2.43.0
next prev parent reply other threads:[~2026-03-11 7:27 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-11 7:26 [PATCH v1 00/13] hw/usb/ehci: Add 64-bit descriptor addressing support Jamin Lin
2026-03-11 7:26 ` [PATCH v1 01/13] hw/usb/hcd-ehci.h: Fix coding style issues reported by checkpatch Jamin Lin
2026-03-11 7:26 ` [PATCH v1 02/13] hw/usb/hcd-ehci.c: " Jamin Lin
2026-03-11 7:26 ` [PATCH v1 03/13] hw/usb/hcd-ehci: Change descriptor addresses to 64-bit Jamin Lin
2026-03-11 7:26 ` [PATCH v1 04/13] hw/usb/trace-events: Print EHCI queue and transfer addresses as 64-bit Jamin Lin
2026-03-11 7:26 ` [PATCH v1 05/13] hw/usb/hcd-ehci: Add property to advertise 64-bit addressing capability Jamin Lin
2026-03-11 7:26 ` [PATCH v1 06/13] hw/usb/hcd-ehci: Reject CTRLDSSEGMENT writes without 64-bit capability Jamin Lin
2026-03-11 7:26 ` [PATCH v1 07/13] hw/usb/hcd-ehci: Implement 64-bit QH descriptor addressing Jamin Lin
2026-03-11 7:26 ` [PATCH v1 08/13] hw/usb/hcd-ehci: Implement 64-bit qTD " Jamin Lin
2026-03-11 7:26 ` [PATCH v1 09/13] hw/usb/hcd-ehci: Implement 64-bit iTD " Jamin Lin
2026-03-11 7:26 ` Jamin Lin [this message]
2026-03-11 7:26 ` [PATCH v1 11/13] hw/usb/hcd-ehci: Add descriptor address offset property Jamin Lin
2026-03-11 7:26 ` [PATCH v1 12/13] hw/arm/aspeed_ast27x0: Enable 64-bit EHCI DMA addressing Jamin Lin
2026-03-11 7:26 ` [PATCH v1 13/13] hw/arm/aspeed_ast27x0: Set EHCI descriptor address offset Jamin Lin
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