Re: [PATCH 59/65] hw/arm/virt: Split GICv2 and GICv3/4 creation

[Jonathan Cameron via qemu development <qemu-devel@nongnu.org>]

On Mon, 23 Feb 2026 17:02:06 +0000
Peter Maydell <peter.maydell@linaro.org> wrote:

> Currently create_gic() handles GICv2 and GICv3/4 in a single
> function, with large sections that are conditional on the
> vms->gic_version.  GICv5 will be different to both.
> 
> Refactor into create_gicv2() and create_gicv3().
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
One trivial comment inline.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>

> ---
>  hw/arm/virt.c | 137 ++++++++++++++++++++++++++++++--------------------
>  1 file changed, 82 insertions(+), 55 deletions(-)
> 
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index ec6e49099a..3d19eb0fee 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -863,26 +863,58 @@ static void gic_connect_ppis(VirtMachineState *vms)
>      }
>  }

> +static void create_gicv3(VirtMachineState *vms, MemoryRegion *mem)
>  {
>      MachineState *ms = MACHINE(vms);
>      /* We create a standalone GIC */
>      SysBusDevice *gicbusdev;
> -    const char *gictype;
>      unsigned int smp_cpus = ms->smp.cpus;
>      uint32_t nb_redist_regions = 0;
I think this now always set before use so can drop the initialization.

>      int revision;
> -
> -    if (vms->gic_version == VIRT_GIC_VERSION_2) {
> -        gictype = gic_class_name();
> -    } else {
> -        gictype = gicv3_class_name();
> -    }
> +    QList *redist_region_count;
> +    uint32_t redist0_capacity = virt_redist_capacity(vms, VIRT_GIC_REDIST);
> +    uint32_t redist0_count = MIN(smp_cpus, redist0_capacity);
>  
>      switch (vms->gic_version) {
> -    case VIRT_GIC_VERSION_2:
> -        revision = 2;
> -        break;
>      case VIRT_GIC_VERSION_3:
>          revision = 3;
>          break;
> @@ -899,10 +931,11 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
>          exit(1);
>      }
>  
> -    vms->gic = qdev_new(gictype);
> +    vms->gic = qdev_new(gicv3_class_name());
>      qdev_prop_set_uint32(vms->gic, "revision", revision);
>      qdev_prop_set_uint32(vms->gic, "num-cpu", smp_cpus);
> -    /* Note that the num-irq property counts both internal and external
> +    /*
> +     * Note that the num-irq property counts both internal and external
>       * interrupts; there are always 32 of the former (mandated by GIC spec).
>       */
>      qdev_prop_set_uint32(vms->gic, "num-irq", NUM_IRQS + 32);
> @@ -910,40 +943,28 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
>          qdev_prop_set_bit(vms->gic, "has-security-extensions", vms->secure);
>      }
>  
> -    if (vms->gic_version != VIRT_GIC_VERSION_2) {
> -        QList *redist_region_count;
> -        uint32_t redist0_capacity = virt_redist_capacity(vms, VIRT_GIC_REDIST);
> -        uint32_t redist0_count = MIN(smp_cpus, redist0_capacity);
> +    nb_redist_regions = virt_gicv3_redist_region_count(vms);

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